ISL3873BIK Intersil, ISL3873BIK Datasheet - Page 32

• Manufacturer Part Number: ISL3873BIK
• Manufacturer: Intersil

Specifications of ISL3873BIK

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Bits 0 - 7
Bits 7:5
Bit 4
Bits 3
Bit 2
Bits 1:0
Bits 7:0
Bits 7:0
Bits 7:0
Bit 7
Bits 6:5
Bit 4
Bit 3
Bit 2
CONFIGURATION REGISTER 4 ADDRESS (08h) R/W TX PREAMBLE LENGTH FOR LONG PREAMBLE
This register contains the count for the Preamble length counter for long preambles selected with CR5 bit 3 or CR11 bit 4.
Setup while TX_PE is low. For IEEE 802.11 use 80h. For other than IEEE 802.11 applications, in general increasing the
preamble length will improve low signal to noise acquisition performance at the cost of greater link overhead. The minimum
suggested value is 56d = 38h. A 2 symbol TX power amplifier ramp up is added to programmed value. If you program 128 you get
130.
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
TX/RX filter / CMF weight select.
0 = US.
1 = Japan for channel 14 compliance.
Select preamble mode.
0 = Normal, long preamble interoperable with 1 and 2Mbps legacy equipment.
1 = short preamble and header mode (optional in 802.11).
Reserved, must be set to 0.
TX data Rate. Must be set at least 2 s before needed in TX frame. This selects TX signal field code from the registers above.
00 = DBPSK - 11 chip sequence (1Mbps).
01 = DQPSK - 11 chip sequence (2Mbps).
10 = CCK - 8 chip sequence (5.5Mbps).
11 = CCK - 8 chip sequence (11Mbps).
Bit 7 may be employed by the MAC in 802.11 situations to resolve an ambiguity in the length field when in the 11Mbps mode.
Bit 2 should be set to a 1 where the reference oscillator of the radio is common for both the carrier frequency and the data
clock. All other bits should be set to 0 to ensure compatibility.
This 8-bit register contains the higher byte (bits 8-15) of the transmit Length Field described in the Header. This byte combined
with the lower byte indicates the number of microseconds the data packet will take.
This 8-bit register contains the lower byte (bits 0-7) of the transmit Length Field described in the Header. This byte combined
with the higher byte indicates the number of microseconds the data packet will take.
CCA sample mode time.
0 = 18.7 s.
1 = 15.8 s.
CCA mode.
00 - CCA is based only on ED.
01 - CCA is based on (CS1 OR SQ1).
10 - CCA is based on (ED AND (CS1 OR SQ1)).
11 - CCA is based on (ED OR (CS1 OR SQ1)).
TX test modes (set CR5 bits 1:0 to 00 also), (set CR32 = 0CH).
0 = Alternating bits for carrier suppression test.
1 = all chips set to 1 for CW carrier. This allows frequency measurement.
Enable TX test modes.
0 = normal operation.
1 = Invoke tests described by bit 4.
Antenna choice for TX when TX antenna diversity is disabled.
0 = Set AntSel low.
1 = Set AntSel high.
CONFIGURATION REGISTER 7 ADDRESS (0Eh) R/W TX LENGTH FIELD (HIGH)
CONFIGURATION REGISTER 8 ADDRESS (10h) R/W TX LENGTH FIELD (LOW)
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CONFIGURATION REGISTER 6 ADDRESS (0Ch) R/W TX SERVICE FIELD
CONFIGURATION REGISTER 5 ADDRESS (0Ah) R/W TX SIGNAL FIELD
CONFIGURATION REGISTER 9 ADDRESS (12h) R/W TX CONFIGURE
ISL3873B