SCANSTA111SM National Semiconductor, SCANSTA111SM Datasheet - Page 20

• Manufacturer Part Number: SCANSTA111SM
• Manufacturer: National Semiconductor

Specifications of SCANSTA111SM

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: FBGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Not Compliant

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This moves the local chain TAP Controllers to the synchro-
nization state (Run-Test/Idle), where they stay until synchro-
nization occurs. If the next state of the 'STA111 TAP
Controller is Run-Test/Idle, TMS
the local TAP Controllers are synchronized to the 'STA111
TAP Controller as shown in
Update-IR were Select-DR, TMS
chronization would not occur until the 'STA111 TAP Controller
entered the Run-Test/Idle state, as shown in
Each local port has its own Local Scan Port Controller. This
is necessary because the LSPN can be configured in any one
of eight (8) possible combinations. Either one, some, or all of
the local ports can be accessed simultaneously. Configuring
the LSPN is accomplished with Mode Register
tion with the UNPARK instruction.
The LSPN can be unparked in one of seven different config-
urations (Si device), as specified by bits 0-2 of Mode Regis-
ter
synchronizing the 'STA111 TAP Controller with the TAP Con-
trollers of an individual local port, but also of synchronizing
the individual local ports to one another.
When multiple local ports are selected for access, it is possi-
ble that two ports are parked in different states. This could
occur when previous operations accessed the two ports sep-
arately and parked them in the two different states. The LSP
Controllers handle this situation gracefully.
the UNPARK instruction being used to access LSP
and LSP
0
. Using multiple ports presents not only the task of
2
in series (Mode Register
Figure
FIGURE 11. Local Scan Port Synchronization on Second Pass
n
n
FIGURE 12. Synchronization of the Three Local Scan Ports
would remain low and syn-
is connected to TMS
12. If the next state after
0
= XXX0X111 binary).
Figure 12
Figure
0
, in conjunc-
11.
0
, LSP
shows
B
and
1
,
20
LSP
sequenced through the Run-Test/Idle state. LSP
parked in the Pause-DR state until the 'STA111 TAP Con-
troller is sequenced through the Pause-DR state. At that point,
all three local ports are synchronized for access via the active
scan chain.
PARAMETERIZED DESIGN (HDL)
In order to support a large number of applications, the
'STA111 HDL is parameterized as described:
•
•
•
Number of Local Scan Ports (LSPs): The 'STA111 HDL
is able to simulate/synthesize a device that contains from
1 to 8 LSPs. LSP
Register
Register
synthesized with three LSPs, LSP
Number of Address Pins: The 'STA111 has a selectable
number of address bits (S
5 to 7). Addresses 3A through 3F hex are reserved for
address interrogation, broadcast and multi-cast
addressing. The silicon version of the 'STA111 is
synthesized with seven address pins.
Pass-Through Pins: Each of the LSPs (0-n) may
selectively have or not have Pass-through pins. Pass-
through pins are described in more detail below. The
silicon version of the 'STA111 is synthesized with Pass-
through pins on LSP
0
and LSP
0
1
. The silicon version of the 'STA111 is
and LSP
1
become active as the 'STA111 controller is
0
5
through LSP
through LSP
0
and LSP
0
- S
n
1
4
, where n can range from
.
7
are controlled via Mode
are controlled via Mode
0
through LSP
2
2
remains
.
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