ICS9DB1200CGLF IDT, Integrated Device Technology Inc, ICS9DB1200CGLF Datasheet - Page 6
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ICS9DB1200CGLF
Manufacturer Part Number
ICS9DB1200CGLF
Description
IC BUFFER 12OUTPUT DIFF 64-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Bufferr
Series
-r
Datasheet
1.ICS9DB1200CGLFT.pdf
(14 pages)
Specifications of ICS9DB1200CGLF
Input
Differential
Output
Differential
Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-TSSOP
Frequency-max
400MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
9DB1200CGLF
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ICS9DB1200CGLF
Manufacturer:
IDT
Quantity:
124
Part Number:
ICS9DB1200CGLF
Manufacturer:
IDT
Quantity:
20 000
Part Number:
ICS9DB1200CGLFT
Manufacturer:
IDT
Quantity:
20 000
Electrical Characteristics - Clock Input Parameters
IDT
1
2
CK410B+/CK509B accuracy requirements. The 9DB1200 itself does not contribute to ppm error.
3
4
5
T
Input Slew Rate - DIF_IN
1
2
Electrical Characteristics - DIF 0.7V Current Mode Differential Pair
T
Input Amplitude - DIF_IN
Slew rate measured through Vswing min centered around differential zero
Guaranteed by design and characterization, not 100% tested in production.
I
All Long Term Accuracy specifications are guaranteed with the assumption that the input clock complies with
A
Guaranteed by design and characterization, not 100% tested in production.
Input Leakage Current
A
REF
Applies to Bypass Mode Only
Measured from differential waveform
ICS9DB1200C
Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM
Input Common Mode
Input Jitter - Cycle to
Input High Voltage -
Skew, Output to Output
TM
Input Low Voltage -
Crossing Voltage (abs)
= 0 - 70°C; Supply Voltage V
Current Source Output
= 0 - 70°C; V
Crossing Voltage (var)
Skew, Input to Output
Voltage - DIF_IN
Input Duty Cycle
Jitter, Cycle to cycle
/ICS
Rise Time Variation
Fall Time Variation
= V
PARAMETER
Long Accuracy
PARAMETER
Voltage High
Voltage Low
Max Voltage
TM
Min Voltage
DIF_IN
DD
DIF_IN
Impedance
Duty Cycle
Rise Time
Cycle
Fall Time
Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM
/(3xR
DD
R
). For R
= 3.3 V +/-5%; C
SYMBOL
R
V
V
= 475Ω (1%), I
V
V
dv/dt
J
SWING
d
IHDIF
DIFIn
ILDIF
I
COM
IN
tin
Vcross(abs)
DD
SYMBOL
d-Vcross
= 3.3 V +/-5%
VHigh
t
VLow
Vuds
t
Vovs
t
jcyc-cyc
ppm
pdBYP
pdPLL
Zo
d-t
d-t
t
d
sk3
L
t
t
t3
r
f
=2pF, R
1
r
f
Measurement from differential
Common Mode Input Voltage
(single-ended measurement)
(single-ended measurement)
REF
Differential Measurement
Measured differentially
V
Statistical measurement on single ended
Measurement from differential wavefrom
signal using oscilloscope math function.
S
Peak to Peak value
= 2.32mA. I
IN
=33.2Ω, R
Differential inputs
Differential inputs
Measurement on single ended signal
Variation of crossing over all edges
CONDITIONS
= V
BYPASS mode as additive jitter
wavefrom
see Tperiod min-max values
V
V
DD ,
Bypass Mode, V
OL
OH
using absolute value.
PLL Mode V
V
= 0.175V, V
= 0.525V V
IN
P
OH
=49.9Ω, R
CONDITIONS
= GND
V
PLL mode
= 6 x I
V
T
O
= 50%
6
= V
REF
T
OH
OL
REF
x
= 50%
T
= 0.175V
= 0.525V
and V
= 50%
=475Ω
V
SS
OH
MIN
600
300
300
0.4
45
-5
0
- 300
= 0.7V @ Z
TYP
3000
800
-150
-300
-250
MIN
660
250
175
175
2.5
45
0
O
=50Ω.
TYP
MAX
1150
1000
1450
300
125
55
8
5
1150
MAX
850
150
550
140
700
700
125
125
250
4.5
UNITS NOTES
55
50
50
50
0
V/ns
mV
mV
mV
mV
uA
ps
%
UNITS NOTES
ppm
mV
mV
mV
mV
1414E—11/04/09
ps
ps
ps
ps
ps
ps
ps
ps
ps
%
1,2
Ω
1
1
1
1
1
1
1
1,3
1,3
1,2
1,5
1,5
1
1
1
1
1
1
1
1
1
1
1
1
1