SI5368B-C-GQR Silicon Laboratories Inc, SI5368B-C-GQR Datasheet - Page 24

• Manufacturer Part Number: SI5368B-C-GQR
• Description: IC CLK MULTIPLIER ATTEN 100TQFP
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5368B-C-GQR

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si5368
Reset value = 0010 1100
24
Register 6.
Name
Type
Bit
5:3
Bit
7
6
Reserved
SFOUT4_
REG [2:0]
Reserved
SLEEP
Name
D7
R
SLEEP
Reserved.
SLEEP.
In sleep mode, the clock outputs are disabled and the maximum amount of internal
circuitry is powered down to reduce power dissipation and noise generation. This bit
overrides the SFOUTn_REG[2:0] output signal format settings.
Note: Output skew is random coming out of SLEEP until a successful ICAL is completed.
0: Normal operation
1: Sleep mode
SFOUT4_REG [2:0].
Controls output signal format and disable for CKOUT4 output buffer. The LVPECL and
CMOS output formats draw more current than either LVDS or CML; however, there are
restrictions in the allowed output format pin settings so that the maximum power dissipa-
tion for the TQFP devices is limited when they are operated at 3.3 V. When there are four
enabled LVPECL or CMOS outputs, the fifth output must be disabled. When there are
five enabled outputs, there can be no more than three outputs that are either LVPECL or
CMOS.
000: Reserved
001: Disable
010: CMOS
011: Low swing LVDS
100: Reserved
101: LVPECL
110: CML
111: LVDS
R/W
D6
D5
SFOUT4_REG [2:0]
Preliminary Rev. 0.41
R/W
D4
Function
D3
D2
SFOUT3_REG [2:0]
R/W
D1
D0