SI5368B-B-GQ Silicon Laboratories Inc, SI5368B-B-GQ Datasheet
SI5368B-B-GQ
Specifications of SI5368B-B-GQ
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SI5368B-B-GQ Summary of contents
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Description The Si5368 is a jitter-attenuating precision clock multiplier for applications requiring sub 1 ps rms jitter performance. The Si5368 accepts four clock inputs ...
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Si5368 Table 1. Performance Specifications (V = 1.8 or 2.5 V ±10 – º Parameter Symbol Temperature Range T Supply Voltage V Supply Current I DD Input Clock Frequency CK (CKIN1, CKIN2, CKIN3, CKIN4) ...
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Table 1. Performance Specifications (Continued 1.8 or 2.5 V ±10 – º Parameter Symbol Output Clocks (CKOUT1, CKOUT2, CKOUT3, CKOUT4, CKOUT5/FS_OUT) Common Mode V OCM Differential Output Swing V Single Ended Output ...
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Si5368 0 -20 -40 -60 -80 -100 -120 -140 -160 100 1000 Table 2. Absolute Maximum Ratings Parameter DC Supply Voltage LVCMOS Input Voltage Junction Temperature Storage Temperature Range ESD HBM Tolerance (100 pF, 1.5 kΩ) ESD MM Tolerance Latch-Up ...
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Figure 2. Si5368 Typical Application Circuit (I Figure 3. Si5368 Typical Application Circuit (SPI Control Mode) Preliminary Rev. 0.3 Si5368 2 C Control Mode) 5 ...
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Si5368 1. Functional Description The Si5368 is a jitter-attenuating precision clock multiplier for applications requiring sub 1 ps rms jitter performance. The Si5368 accepts four clock inputs ranging from 2 kHz to 710 MHz and generates five independent, synchronous clock ...
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Pin Descriptions: Si5368 100 RST NC 4 VDD 5 VDD 6 GND 7 GND 8 C1B 9 10 C2B C3B 11 12 INT_ALM CS0_C3A 13 GND 14 15 VDD ...
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Si5368 Table 3. Si5368 Pin Descriptions (Continued) Pin # Pin Name I 15, 27, V Vdd DD 62, 63, 76, 79, 81, 84, 86, 89, 91, 94, 96, 99, 100 7, 8, 14, 18, GND GND 19, 26, ...
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Table 3. Si5368 Pin Descriptions (Continued) Pin # Pin Name I/O Signal Level 13 CS0_C3A I/O 57 CS1_C4A FS_ALIGN I 29 CKIN4 CKIN4– Note: Internal register names are indicated by underlined italics, ...
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Si5368 Table 3. Si5368 Pin Descriptions (Continued) Pin # Pin Name I/O 32 RATE1 I 42 RATE0 34 CKIN2 CKIN2– 39 CKIN3 CKIN3– 44 CKIN1 CKIN1– 49 LOL O 54 DEC I Note: Internal ...
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Table 3. Si5368 Pin Descriptions (Continued) Pin # Pin Name I/O Signal Level 55 INC I 58 C1A O 59 C2A O 60 SCL I 61 SDA_SDO I A2_SS I Note: Internal register names ...
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Si5368 Table 3. Si5368 Pin Descriptions (Continued) Pin # Pin Name I/O 71 SDI I 77 CKOUT3 CKOUT3– 82 CKOUT1– CKOUT1+ 87 FS_OUT– FS_OUT+ 90 CMODE I 92 CKOUT2 CKOUT2– 97 CKOUT4– ...
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... Ordering Guide Ordering Part Output Clock Number Frequency Range Si5368A-B-GQ 2 kHz–945 MHz 970–1134 MHz 1.213–1.417 GHz Si5368B-B-GQ 2 kHz–808 MHz Si5368C-B-GQ 2 kHz–346 MHz Package 100-Pin TQFP 100-Pin TQFP 100-Pin TQFP Preliminary Rev. 0.3 Si5368 Temperature Range – °C – ...
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Si5368 4. Package Outline: 100-Pin TQFP Figure 4 illustrates the package details for the Si5368. Table 4 lists the values for the dimensions shown in the illustration. Figure 4. 100-Pin Thin Quad Flat Package (TQFP) Table 4. Dimension Min Nom ...
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Recommended PCB Layout Figure 5. PCB Land Pattern Diagram Preliminary Rev. 0.3 Si5368 15 ...
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Si5368 Table 5. PCB Land Pattern Dimensions Dimension Notes (General): 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing is per ...
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D C OCUMENT HANGE LIST Revision 0.1 to Revision 0.2 Changed LVTTL to LVCMOS in Table 2, “Absolute Maximum Ratings,” on page 4. Updated Figure 2 and Figure 3 on page 5. Updated “2. Pin Descriptions: Si5368”. Added RATE0 to ...
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