ICS83948AYILF IDT, Integrated Device Technology Inc, ICS83948AYILF Datasheet - Page 2

• Manufacturer Part Number: ICS83948AYILF
• Description: IC FANOUT BUFFER 1:12 32-LQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution), Multiplexerr

Specifications of ICS83948AYILF

• Number Of Circuits: 1
• Ratio - Input:output: 2:12
• Differential - Input:output: Yes/No
• Input: HCSL, LVCMOS, LVDS, LVHSTL, LVPECL, LVTTL, SSTL
• Output: LVCMOS, LVTTL
• Frequency - Max: 250MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 250MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1120; 83948AYILF

Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Function Tables
Table 3A. Clock Select Function Table
IDT™ / ICS™ LVCMOS/LVTTL CLOCK GENERATOR
Symbol
C
R
R
C
R
20, 24, 28, 32
ICS83948I
LOW SKEW, 1-TO-12 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
15, 17, 19,
21, 23, 25,
10, 14, 18,
IN
PULLUP
PULLDOWN
PD
OUT
Control Input
27, 29, 31
22, 26, 30
8, 12, 16,
9, 11, 13,
Number
CLK_SEL
1
2
3
4
5
6
7
0
1
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Power Dissipation Capacitance
(per output)
Output Impedance
LVCMOS_CLK
Q11, Q10, Q9,
Q8, Q7, Q6,
Q5, Q4, Q3,
Q2, Q1, Q0
CLK_SEL
CLK_EN
Name
nCLK
V
GND
CLK
V
OE
DDO
De-selected
DD
CLK/nCLK
Selected
Output
Power
Power
Power
Input
Input
Input
Input
Input
Input
Clock
Type
LVCMOS_CLK
De-selected
Pulldown
Pullup
Pullup
Pullup
Pullup
Pullup
Selected
Test Conditions
Description
Clock select input. When HIGH, selects LVCMOS_CLK input.
When LOW, selects CLK/nCLK inputs. LVCMOS / LVTTL interface levels.
Single-ended clock input. LVCMOS/LVTTL interface levels.
Non-inverting differential clock input.
Inverting differential clock input.
Clock enable pin. LVCMOS/LVTTL interface levels.
Output enable pin. LVCMOS/LVTTL interface levels.
Positive supply pin.
Power supply ground.
Single-ended clock outputs. LVCMOS/LVTTL interface levels.
Output supply pins.
2
Minimum
ICS83948AYI REV. C NOVEMBER 7, 2008
Typical
51
51
25
4
7
Maximum
Units
k
k
pF
pF
Ω
Ω
Ω