IDT8535-01PGGI8 IDT, Integrated Device Technology Inc, IDT8535-01PGGI8 Datasheet - Page 2
![no-image](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_sml.jpg)
IDT8535-01PGGI8
Manufacturer Part Number
IDT8535-01PGGI8
Description
IC FANOUT BUFFER LVPECL 20-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Fanout Buffer (Distribution), Multiplexerr
Datasheet
1.IDT8535-01PGG8.pdf
(11 pages)
Specifications of IDT8535-01PGGI8
Number Of Circuits
1
Ratio - Input:output
2:4
Differential - Input:output
No/Yes
Input
LVCMOS, LVTTL
Output
LVPECL
Frequency - Max
266MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Frequency-max
266MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
8535-01PGGI8
PIN CONFIGURATION
PIN DESCRIPTION
NOTE:
1. Pullup and Pulldown refer to internal input resistors. See Capacitance table for typical values.
IDT8535-01
LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL
CLK_SEL
CLK_EN
xQ3, Q3
xQ1, Q1
xQ0, Q0
Symbol
xQ2 Q2
CLK0
CLK1
V
V
N C
DD
EE
CLK_SEL
CLK_EN
CLK0
CLK1
V
V
NC
NC
NC
NC
DD
EE
Number
10, 13, 18
5, 7, 8, 9
11, 12
14, 15
16, 17
19, 20
1
2
3
4
6
1
2
3
4
5
6
7
8
9
10
TOP VIEW
TSSOP
(1)
Unused
Power
Power
Output
Output
Output
Output
Input
Input
Input
Input
20
19
18
17
16
15
14
13
12
11
Type
Q0
xQ0
V
Q1
xQ1
Q2
xQ2
V
Q3
xQ3
Pulldown
Pulldown
Pulldown
DD
DD
Pullup
2
ABSOLUTE MAXIMUM RATINGS
CAPACITANCE
NOTE:
1. Stresses beyond those listed under ABSOLUTE MAXIMUM RATINGS may cause
R
Parameter
Symbol
V
V
V
θ
T
Negative Supply Pin
Synchronizing Clock Enable. When HIGH, clock outputs follow clock input. When
LOW, Q outputs are forced LOW, xQ outputs are forced HIGH. LVCMOS / LVTTL
interface levels.
Clock Select Input. When HIGH, selects CLK1 input. When LOW, selects CLK0
input. LVCMOS / LVTTL interface levels.
LVCMOS / LVTTL Clock Input
LVCMOS / LVTTL Clock Input
No Connection
Positive Supply Pins
Differential Output Pair. LVPECL interface levels.
Differential Output Pair. LVPECL interface levels.
Differential Output Pair. LVPECL interface levels.
Differential Output Pair. LVPECL interface levels.
R
PULLDOWN
STG
DD
I
O
JA
permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability.
PULLUP
C
IN
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
Power Supply Voltage
Input Voltage
Output Voltage
Package Thermal Impedance (0 lfpm)
Storage Temperature
Description
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Description
(T
A
= +25°C, f = 1MHz, V
Description
Typ.
–0.5 to V
–0.5 to V
—
51
51
–65 to +150
IN
= 0V)
Max
92.6
4.6
DD
DD
Max.
—
—
4
(1)
+0.5
+0.5
°C/W
Unit
Unit
K Ω
K Ω
°C
pF
V
V
V