ICS85310AYI-11LFT IDT, Integrated Device Technology Inc, ICS85310AYI-11LFT Datasheet - Page 3
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ICS85310AYI-11LFT
Manufacturer Part Number
ICS85310AYI-11LFT
Description
IC FANOUT BUFFER 1-5 DUAL 32LQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
HiPerClockS™r
Type
Fanout Buffer (Distribution), Multiplexerr
Datasheet
1.ICS85310AYI-11LFT.pdf
(18 pages)
Specifications of ICS85310AYI-11LFT
Number Of Circuits
1
Ratio - Input:output
2:10
Differential - Input:output
Yes/Yes
Input
HCSL, LVDS, LVHSTL, LVPECL, SSTL
Output
ECL, LVPECL
Frequency - Max
700MHz
Voltage - Supply
2.375 V ~ 3.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-LQFP
Frequency-max
700MHz
Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
700MHz
Output Logic Level
ECL/LVPECL
Operating Supply Voltage (min)
-2.375/2.375V
Operating Supply Voltage (typ)
-2.5/-3.3/3.3V
Operating Supply Voltage (max)
-3.8/3.8V
Package Type
LQFP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
85310AYI-11LFT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ICS85310AYI-11LFT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
ICS85310I-11 Data Sheet
Function Tables
Table 3A. Control Input Function Table
After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as shown in Figure 1.
In the active mode, the state of the outputs are a function of the CLK0, nCLK0 and CLK1, nCLK1 input as described in Table 3B.
Figure 1. CLK_EN Timing Diagram
Table 3B. Clock Input Function Table
NOTE 1: Please refer to the Applications Information, Wiring the Differential Input to Accept Single-ended Levels.
ICS85310AYI-11 REVISION F JUNE 9, 2010
nCLK[0:1]
CLK[0:1]
CLK_EN
nQ[0:9]
Biased; NOTE 1
Biased; NOTE 1
CLK_EN
CLK0 or CLK1
Q[0:9]
0
1
0
1
0
1
Inputs
Inputs
Selected Source
CLK0, nCLK0
CLK1, nCLK1
nCLK0 or nCLK1
Biased; NOTE 1
Biased; NOTE 1
Disabled
1
1
0
0
Disabled; LOW
Enabled
Q[0:9]
HIGH
HIGH
HIGH
Q[0:9]
LOW
LOW
LOW
Outputs
Outputs
LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER
nQ[0:9]
3
HIGH
HIGH
HIGH
LOW
LOW
LOW
Disabled; HIGH
Enabled
nQ[0:9]
Single-ended to Differential
Single-ended to Differential
Single-ended to Differential
Single-ended to Differential
Differential to Differential
Differential to Differential
Input to Output Mode
Enabled
©2010 Integrated Device Technology, Inc.
Non-Inverting
Non-Inverting
Non-Inverting
Non-Inverting
Inverting
Inverting
Polarity