MAX9325EQI+ Maxim Integrated Products, MAX9325EQI+ Datasheet - Page 5
![IC DRIVER DIFF 2:8 28-PLCC](/photos/6/52/65249/406-28-plcc_sml.jpg)
MAX9325EQI+
Manufacturer Part Number
MAX9325EQI+
Description
IC DRIVER DIFF 2:8 28-PLCC
Manufacturer
Maxim Integrated Products
Type
Fanout Buffer (Distribution), Multiplexer , Datar
Datasheet
1.MAX9325EQI.pdf
(12 pages)
Specifications of MAX9325EQI+
Number Of Circuits
1
Ratio - Input:output
2:8
Differential - Input:output
Yes/Yes
Input
HSTL, LVECL, LVPECL
Output
LVECL, LVPECL
Frequency - Max
700MHz
Voltage - Supply
2.375 V ~ 3.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-LCC, 28-PLCC
Frequency-max
700MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AC ELECTRICAL CHARACTERISTICS—QFN Package
((V
are at (V
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10: Measured between outputs of different parts under identical condition for same-edge transition.
Note 11: Device jitter added to the input signal. Differential input signal.
Differential
Input-to-Output
Delay
Single-Ended
Input-to-Output
Delay
Output-to-
Output Skew
Part-to-Part
Skew
Added Random
Jitter
Added
Deterministic
Jitter
Switching
Frequency
Output Rise/Fall
Time (20% to
80%)
PARAMETER
CC
2:8 Differential LVPECL/LVECL/HSTL Clock and
- V
CC
EE
Measurements are made with the device in thermal equilibrium.
Current into a pin is defined as positive. Current out of a pin is defined as negative.
DC parameters production tested at T
Single-ended input operation using V
Use V
All pins open except V
Guaranteed by design and characterization. Limits are set at ±6 sigma.
Measured from the 50% point of the input signal with the 50% point equal to V
Measured between outputs of the same part at the signal crossing points for a same-edge transition. Differential input signal.
) = 2.375V to 3.8V, R
- V
EE
BB
) = 3.3V, V
only for inputs that are on the same device as the V
SYMBOL
_______________________________________________________________________________________
t
t
t
t
SKOO
f
t
PLHD
PHLD
t
t
SKPP
MAX
R
PLH
PHL
t
t
RJ
DJ
, t
F
IH
= (V
Figure 2
Figure 3 (Note 8)
(Note 9)
Differential input
(Note 10)
f
clock pattern
(Note 11)
f
2E
pattern (Note 11)
V
300mV clock
pattern
Figure 2
IN
IN
OH
L
CONDITIONS
CC
23
CC
= 0.5GHz
= 1.0Gbps,
= 50Ω ±1% to V
- 1 PRBS
- V
and V
- 1V), V
OL
≥
EE
.
IL
= (V
BB
A
= +25°C and guaranteed by design over the full operating temperature range.
CC
is limited to (V
CC
MIN
250
253
1.5
97
- 2V, f
- 1.5V).) (Note 7)
-40°C
TYP
IN
≤ 500MHz, input transition time = 125ps (20% to 80%). Typical values
CC
MAX
575
581
192
411
1.5
- V
50
95
BB
EE
) = 3.0V to 3.8V.
reference.
MIN
298
310
104
1.5
+25°C
TYP
BB
, to the 50% point of the output signal.
MAX
553
586
215
210
1.5
50
95
MIN
309
324
111
1.5
Data Driver
+85°C
TYP
MAX
576
606
218
232
1.5
50
95
UNITS
ps
ps
GHz
ps
ps
ps
ps
ps
RMS
P-P
5