ICS84320AY-01LN IDT, Integrated Device Technology Inc, ICS84320AY-01LN Datasheet - Page 11

IC SYNTHESIZER GP LVPECL 32-LQFP

ICS84320AY-01LN

Manufacturer Part Number
ICS84320AY-01LN
Description
IC SYNTHESIZER GP LVPECL 32-LQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
HiPerClockS™r
Type
Frequency Synthesizerr
Datasheet

Specifications of ICS84320AY-01LN

Pll
Yes with Bypass
Input
Crystal
Output
LVPECL
Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
No/Yes
Frequency - Max
780MHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-LQFP
Frequency-max
780MHz
Number Of Elements
1
Supply Current
155mA
Pll Input Freq (min)
14MHz
Pll Input Freq (max)
40MHz
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
TQFP
Output Frequency Range
77.5 to 780MHz
Operating Supply Voltage (min)
2.915/3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Commercial
Pin Count
32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-1140
84320AY-01LN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS84320AY-01LN
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
ICS84320AY-01LN
Manufacturer:
ICS
Quantity:
20 000
Part Number:
ICS84320AY-01LNT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
T
The clock layout topology shown below is a typical termi-
nation for LVPECL outputs. The two different layouts men-
tioned are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, ter-
minating resistors (DC current path to ground) or current
sources must be used for functionality. These outputs are
designed to drive 50Ω transmission lines. Matched imped-
84320AY-01
RTT =
ERMINATION FOR
((V
F
FOUT
OH
IGURE
+ V
OL
5A. LVPECL O
) / (V
1
LVPECL O
CC
Z
Z
– 2)) – 2
o
o
= 50Ω
= 50Ω
Z
o
UTPUT
50Ω
UTPUTS
T
ERMINATION
RTT
50Ω
V
CC
FIN
- 2V
www.idt.com
11
ance techniques should be used to maximize operating
frequency and minimize signal distortion. Figures 5A and
5B show two different layouts which are recommended only
as guidelines. Other suitable clock layouts may exist and it
would be recommended that the board designers simulate
to guarantee compatibility across all printed circuit and clock
component process variations.
780MH
FOUT
F
IGURE
LVPECL F
Z
, C
5B. LVPECL O
RYSTAL
Z
Z
o
o
= 50Ω
= 50Ω
REQUENCY
-
125Ω
TO
84Ω
-3.3V D
ICS84320-01
UTPUT
3.3V
T
125Ω
84Ω
ERMINATION
S
IFFERENTIAL
YNTHESIZER
REV. D JULY 26, 2010
FIN

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