AD9516-0BCPZ Analog Devices Inc, AD9516-0BCPZ Datasheet - Page 65

• Manufacturer Part Number: AD9516-0BCPZ
• Description: IC CLOCK GEN 2.8GHZ VCO 64-LFCSP
• Manufacturer: Analog Devices Inc
• Type: Clock Generator, Fanout Distributionr

Specifications of AD9516-0BCPZ

• Pll: Yes
• Input: Clock
• Output: CMOS, LVDS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 1:14
• Differential - Input:output: Yes/Yes
• Frequency - Max: 2.95GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Frequency-max: 2.95GHz
• Clock Ic Type: Clock Generator
• Ic Interface Type: Serial
• Frequency: 2.8GHz
• No. Of Outputs: 14
• No. Of Multipliers / Dividers: 32
• Supply Voltage Range: 3.135V To 3.465V
• Digital Ic Case Style: LFCSP
• Function: Clock Generator
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: LFCSP EP
• Pin Count: 64
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Reg.
Addr.
(Hex)
0x01D
0x01F
Bits
4
3
2
1
0
6
5
4
3
2
1
0
Name
PLL status
register disable
LD pin comparator
enable
Holdover enable
External
holdover control
Holdover enable
VCO cal finished
Holdover active
REF2 selected
VCO frequency >
threshold
REF2 frequency >
threshold
REF1 frequency >
threshold
Digital lock detect
Description
Disables the PLL status register readback.
0: PLL status register enable (default).
1: PLL status register disable.
Enables the LD pin voltage comparator. This function is used with the LD pin current source lock detect mode. When
in the internal (automatic) holdover mode, this function enables the use of the voltage on the LD pin to determine if
the PLL was previously in a locked state (see Figure 53). Otherwise, this function can be used with the REFMON and
STATUS pins to monitor the voltage on this pin.
0: disables LD pin comparator; internal/automatic holdover controller treats this pin as true (high) (default).
1: enables LD pin comparator.
Along with Bit 0, enables the holdover function. Automatic holdover must be disabled during VCO calibration.
0: holdover disabled (default).
1: holdover enabled.
Enables the external hold control through the SYNC pin. (This disables the internal holdover mode.)
0: automatic holdover mode—holdover controlled by automatic holdover circuit. (default)
1: external holdover mode—holdover controlled by SYNC pin.
Along with Bit 2, enables the holdover function. Automatic holdover must be disabled during VCO calibration.
0: holdover disabled (default).
1: holdover enabled.
Read-only register. Indicates status of the VCO calibration.
0: VCO calibration not finished.
1: VCO calibration finished.
Read-only register. Indicates if the part is in the holdover state (see Figure 53). This is not the same as holdover enabled.
0: not in holdover.
1: holdover state active.
Read-only register. Indicates which PLL reference is selected as the input to the PLL.
0: REF1 selected (or differential reference if in differential mode).
1: REF2 selected.
Read-only register. Indicates if the VCO frequency is greater than the threshold (see Table 16: REF1, REF2, and VCO
frequency status monitor).
0: VCO frequency is less than the threshold.
1: VCO frequency is greater than the threshold.
Read-only register. Indicates if the frequency of the signal at REF2 is greater than the threshold frequency set by
Register 0x01A, Bit 6.
0: REF2 frequency is less than threshold frequency.
1: REF2 frequency is greater than threshold frequency.
Read-only register. Indicates if the frequency of the signal at REF2 is greater than the threshold frequency
set by Register 0x01A, Bit 6.
0: REF1 frequency is less than threshold frequency.
1: REF1 frequency is greater than threshold frequency.
Read-only register. Digital lock detect.
0: PLL is not locked.
1: PLL is locked.
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AD9516-0