MPC9658AC IDT, Integrated Device Technology Inc, MPC9658AC Datasheet - Page 4

• Manufacturer Part Number: MPC9658AC
• Description: IC PLL CLK GEN 1:10 3.3V 32-LQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of MPC9658AC

• Pll: Yes with Bypass
• Input: LVPECL
• Output: LVCMOS
• Number Of Circuits: 1
• Ratio - Input:output: 1:10
• Differential - Input:output: Yes/No
• Frequency - Max: 250MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 250MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IDT™ / ICS™ 3.3V 1:10 LVCMOS PLL CLOCK GENERATOR
MPC9658
3.3V 1:10 LVCMOS PLL CLOCK GENERATOR
Table 4. General Specifications
Table 5. DC Characteristics (V
1. V
2. The MPC9658 is capable of driving 50 Ω transmission lines on the incident edge. Each output drives one 50 Ω parallel terminated
3. The MPC9658 output levels are compatible to the MPC958 output levels.
4. Inputs have pull-down resistors affecting the input current.
Symbol
Symbol
V
I
CC_PLL
Z
HBM
CMR
I
C
V
MM
V
V
V
C
θ
θ
V
CCQ
LU
V
OUT
I
and the input swing lies within the V
transmission line to a termination voltage of V
JC
OH
IN
TT
PD
JA
PP
OL
IN
IH
IL
CMR
(1)
(DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the V
Output Termination Voltage
ESD Protection (Machine Model)
ESD Protection (Human Body Model)
Latch-Up Immunity
Power Dissipation Capacitance
Input Capacitance
LQFP 32 Thermal resistance junction to ambient
LQFP 32 Thermal resistance junction to case
Input High Voltage
Input Low Voltage
Peak-to-Peak Input Voltage
Common Mode Range
Output High Voltage
Output Low Voltage
Output Impedance
Input Current
Maximum PLL Supply Current
Maximum Quiescent Supply Current
JESD 51-6, 2S2P multilayer test board
(4)
JESD 51-3, single layer test board
Characteristics
Characteristics
(3)
CC
= 3.3 V ± 5%, T
PP
(DC) specification.
TT
. Alternatively, the device drives up to two 50 Ω series terminated transmission lines.
(PCLK)
(PCLK)
A
= 0°C to 70°C)
2000
Min
Min
200
200
250
2.0
1.0
2.4
4
V
14 – 17
CC
83.1
73.3
68.9
63.8
57.4
59.0
54.4
52.5
50.4
47.8
23.0
Typ
Typ
4.0
10
12
13
÷ 2
V
V
CC
CC
±200
Max
86.0
75.4
70.9
65.3
59.6
60.6
55.7
53.8
51.5
48.8
26.3
Max
0.55
0.30
0.8
20
20
+ 0.3
–0.6
MPC9658 REV 6 SEPTEMBER 29, 2006
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
Unit
mA
mV
mA
mA
pF
pF
μA
V
V
V
V
V
V
V
V
V
Ω
Per output
Inputs
Natural
convection
100 ft/min
200 ft/min
400 ft/min
800 ft/min
Natural
convection
100 ft/min
200 ft/min
400 ft/min
800 ft/min
MIL-SPEC 883E
Method 1012.1
LVCMOS
LVCMOS
LVPECL
LVPECL
I
I
I
V
V
All V
OH
OL
OL
IN
CC_PLL
= 24 mA
= 12 mA
= V
Condition
Condition
= –24 mA
CC
CMR
CC
Pins
Pin
or GND
range
(2)