MPC961CAC IDT, Integrated Device Technology Inc, MPC961CAC Datasheet

MPC961CAC

Manufacturer Part Number

MPC961CAC

Description

IC BUFFER ZD 1:18 PLL 32-LQFP

Manufacturer

IDT, Integrated Device Technology Inc

Type

Zero Delay Bufferr

Datasheet

1.MPC961CACR2.pdf (11 pages)

Specifications of MPC961CAC

Pll

Yes

Input

LVCMOS

Output

LVCMOS

Number Of Circuits

Ratio - Input:output

1:17

Differential - Input:output

No/No

Frequency - Max

200MHz

Divider/multiplier

No/No

Voltage - Supply

2.375 V ~ 3.465 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

32-LQFP

Frequency-max

200MHz

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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frequencies of up to 200 MHz, output skews of 150 ps the device meets the needs of the most

demanding clock tree applications.

Features

•

Functional Description

LVCMOS reference clock while the MPC961P offers an LVPECL reference clock.

state. Because the OE pin does not affect the QFB output, down stream clocks can be disabled

without the internal PLL losing lock.

levels and the outputs provide low impedance LVCMOS outputs capable of driving terminated 50 Ω transmission lines. For series terminated

lines the MPC961 can drive two lines per output giving the device an effective fanout of 1:36. The device is packaged in a 32-lead LQFP.

MPC961C REVISION 5 AUGUST 17, 2009

The MPC961 is a 2.5 V or 3.3 V compatible, 1:18 PLL based zero delay buffer. With output

The MPC961 is offered with two different input configurations. The MPC961C offers an

When pulled high the OE pin will force all of the outputs (except QFB) into a high impedance

The MPC961 is fully 2.5 V or 3.3 V compatible and requires no external loop filter components. All control inputs accept LVCMOS compatible

Fully Integrated PLL

Up to 200 MHz I/O Frequency

LVCMOS Outputs

Outputs Disable in High Impedance

LVCMOS Reference Clock Options

LQFP Packaging

32-lead Pb-free Package Available

±50 ps Cycle-Cycle Jitter

150 ps Output Skews

The MPC961C requires an external RC filter for the analog power supply pin V

F_RANGE

FB_IN

CCLK

Low Voltage Zero Delay Buffer

50 k

Ref

100 – 200 MHz

50– 100 MHz

Figure 1. MPC961C Logic Diagram

PLL

CCA

. Refer to

APPLICATIONS INFORMATION

Q14

Q15

Q16

QFB

32-LEAD LQFP PACKAGE

for details.

Pb-FREE PACKAGE

CASE 873A-03

AC SUFFIX

FA SUFFIX

MPC961C

DATA SHEET

Related parts for MPC961CAC

MPC961CAC Summary of contents

Page 1

Low Voltage Zero Delay Buffer The MPC961 3.3 V compatible, 1:18 PLL based zero delay buffer. With output frequencies 200 MHz, output skews of 150 ps the device meets the needs of ...

Page 2

MPC961C Data Sheet GND Table 1. Pin Configurations Number Name CCLK Input FB_IN Input F_RANGE Input OE Input Q0 – Q16 Output QFB Output GND Supply V Supply CCA V Supply CC ...

MPC961C Data Sheet Table 3. Absolute Maximum Ratings Symbol Characteristics V Supply Voltage Input Voltage Output Voltage OUT I DC Input Current Output Current OUT T Storage Temperature S 1. Absolute ...

Page 4

MPC961C Data Sheet = 2.5 V ± 5%, T Table 6. DC Characteristics (V CC Symbol Characteristics V Input HIGH Voltage IH V Input LOW Voltage IL V Output HIGH Voltage OH V Output LOW Voltage OL Z Output Impedance ...

Page 5

MPC961C Data Sheet Power Supply Filtering The MPC961C is a mixed analog/digital product and as such it exhibits some sensitivities that would not necessarily be seen on a fully digital product. Analog circuitry is naturally susceptible to random noise, especially ...

Page 6

MPC961C Data Sheet Ω Ω Ω Ω Ω ...

Page 7

MPC961C Data Sheet Table 8. Confidence Factor CF CF Probability of clock edge within the distribution ± 1σ 0.68268948 ± 2σ 0.95449988 ± 3σ 0.99730007 ± 4σ 0.99993663 ± 5σ 0.99999943 ± 6σ 0.99999999 The feedback trace delay is determined ...

Page 8

MPC961C Data Sheet Where R is the thermal impedance of the package (junction to thja ambient) and T is the ambient temperature. According to A the junction temperature can be used to estimate the long-term device reliability. Further, combining equation ...

Page 9

MPC961C Data Sheet t SK(O) The pin-to-pin skew is defined as the worst case difference in propagation delay between any similar delay path within a single device Figure 12. Output-to-Output Skew ...

Page 10

MPC961C Data Sheet D1/2 PIN 1 INDEX E1 D/2 4X 0. 28X SEATING PLANE C DETAIL (S) A1 DETAIL AD MPC961C REVISION 5 ...

Page 11

MPC961C Data Sheet 6024 Silver Creek Valley Road Sales 800-345-7015 (inside USA) San Jose, California 95138 +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications ...

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