IDT74FCT88915TT70PY IDT, Integrated Device Technology Inc, IDT74FCT88915TT70PY Datasheet - Page 2

• Manufacturer Part Number: IDT74FCT88915TT70PY
• Description: IC PLL CLK GENERATOR 28-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 74FCTr
• Type: Fanout Distribution, Multiplexer , Zero Delay Bufferr

Specifications of IDT74FCT88915TT70PY

• Pll: Yes with Bypass
• Input: LVTTL
• Output: LVCMOS, LVTTL
• Number Of Circuits: 1
• Ratio - Input:output: 2:8
• Differential - Input:output: No/No
• Frequency - Max: 70MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: *
• Frequency-max: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 74FCT88915TT70PY

PIN CONFIGURATIONS
PIN DESCRIPTION
IDT74FCT88915TT
LOW SKEW PLL-BASED CMOS CLOCK DRIVER
FEEDBACK
REF_SEL
FREQ_SEL
GND(AN)
Pin Name
FEEDBK
REF_SEL
SYNC(0)
SYNC(1)
SYNC(0)
SYNC(1)
V
PLL_EN
Q0-Q4
LOCK
CC
RST
Q/2
Q5
2Q
LF
(AN)
LF
5
6
7
8
9
10
11
12
4
13
3
I/O
O
O
O
O
O
I
I
I
I
I
I
I
I
TOP VIEW
14
PLCC
2
15
1
Reference clock input
Reference clock input
Chooses reference between SYNC (0) & SYNC (1) (refer to functional block diagram)
Selects between ÷ 1 and ÷ 2 frequency options (refer to functional block diagram)
Feedback input to phase detector
Input for external loop filter connection
Inverted clock output
Clock output (2 x Q frequency)
Clock output (Q frequency ÷ 2)
Indicates phase lock has been achieved (HIGH when locked)
Asynchronous reset (active LOW)
Disables phase-lock for low frequency testing (refer to functional block diagram)
Clock outputs
16
28
17
27
18
26
25
24
23
22
21
20
19
Q/2
GND
Q3
V
Q2
GND
LOCK
CC
2
FEEDBACK
FREQ_SEL
REF_SEL
GND(AN)
SYNC(0)
SYNC(1)
V
CC
Description
GND
GND
(AN)
RST
V
Q5
Q0
LF
CC
11
12
13
14
1
2
3
4
5
6
7
8
9
10
COMMERCIAL TEMPERATURE RANGE
TOP VIEW
SSOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Q4
V
2Q
Q/2
GND
Q3
V
Q2
GND
LOCK
PLL_EN
GND
Q1
V
CC
CC
CC