IDT74FCT88915TT70PY IDT, Integrated Device Technology Inc, IDT74FCT88915TT70PY Datasheet - Page 4

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IDT74FCT88915TT70PY

Manufacturer Part Number
IDT74FCT88915TT70PY
Description
IC PLL CLK GENERATOR 28-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
74FCTr
Type
Fanout Distribution, Multiplexer , Zero Delay Bufferr
Datasheet

Specifications of IDT74FCT88915TT70PY

Pll
Yes with Bypass
Input
LVTTL
Output
LVCMOS, LVTTL
Number Of Circuits
1
Ratio - Input:output
2:8
Differential - Input:output
No/No
Frequency - Max
70MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
*
Frequency-max
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
74FCT88915TT70PY
POWER SUPPLY CHARACTERISTICS
OUTPUT FREQUENCY SPECIFICATIONS
NOTES:
1. Note 8 in "General AC Specification Notes" and Figure 2 describes this specification and its actual limits depending on the feedback connection.
2. Maximum operating frequency is guaranteed with the part in a phase locked condition and all outputs loaded with 50pF.
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics.
2. Typical values are at V
3. Per TTL driven input; all other inputs at V
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. It is derived with Q frequency as the reference.
5. Values for these conditions are examples of the I
6. I
IDT74FCT88915TT
LOW SKEW PLL-BASED CMOS CLOCK DRIVER
I
I
ΔI
D
N
I
f = 2Q frequency
I
Symbol
Symbol
ΔI
I
C
I
P
P
C
C
CC
CCD
LOAD
CCD
C
H
T
D1
D2
CC
PD
= I
= I
fQ/2
CC
f2Q
= Number of TTL Inputs at D
= Duty Cycle for TTL Inputs High
fQ
= Quiescent Current (I
QUIESCENT
CC
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
= Power Supply Current for a TTL High Input
= Dynamic Current due to load.
+ ΔI
CC
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
Power Dissipation Capacitance
Total Power Supply Current
Power Dissipation
Power Dissipation
+ I
D
H
INPUTS
N
Operating frequency 2Q Output
Operating frequency Q0-Q4, Q5 Outputs
Operating frequency Q/2 Output
T
(4)
+ I
Parameter
CC
+ I
CCD
CCL
DYNAMIC
= 5.0V, +25°C ambient.
(f) + I
, I
CCH
H
LOAD
and I
Parameter
(5,6)
CCZ
CC
)
or GND.
CC
formula. These limits are guaranteed but not tested.
V
V
V
All Outputs Open
50% Duty Cycle
V
PLL_EN = 1, LOCK = 1, FEEDBACK = Q4
SYNC frequency = 50MHz. Q4 loaded with 50pF.
All other outputs open.
V
PLL_EN = 1, LOCK = 1, FEEDBACK = Q4
SYNC frequency = 50MHz. Q4 loaded with 50Ω
Thevenin termination. All other outputs open.
50Ω Thevenin termination @ 33MHz
50Ω Paralell termination to GND @ 33MHz
CC
IN
CC
CC
CC
= V
= Max.
= Max.
= Max.
= Max.
CC
–2.1V
(3)
Test Conditions
4
Min.
(1)
40
20
10
V
V
IN
IN
= V
= GND
13.75
CC
27.5
55
55
17.5
Min.
70
70
35
COMMERCIAL TEMPERATURE RANGE
Max.
(2)
Typ.
100
100
50
25
120
300
0.5
0.5
25
65
(2)
66.7
33.3
133
133
Max.
1.5
0.7
40
80
MHz
Unit
mA/
mW
mW
MHz
MHz
MHz
mA
mA
mA
Unit
pF

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