LMX2470SLEX National Semiconductor, LMX2470SLEX Datasheet - Page 2

• Manufacturer Part Number: LMX2470SLEX
• Description: IC PLL DELTA-SIGMA 24LAMUCSP
• Manufacturer: National Semiconductor
• Type: PLL Frequency Synthesizer, Delta Sigmar

Specifications of LMX2470SLEX

• Pll: Yes with Bypass
• Input: CMOS
• Output: CMOS
• Number Of Circuits: 1
• Ratio - Input:output: 3:3
• Differential - Input:output: Yes/No
• Frequency - Max: 2.6GHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 2.25 V ~ 2.75 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-Laminate UTCSP
• Frequency-max: 2.6GHz
• For Use With: LMX2470EVAL - EVALUATION BOARD FOR LMX2470
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LMX2470SLEX; *LMX2470SLEX/NOPB; LMX2470SLEXCT

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Connection Diagram
Pin Descriptions
Pin #
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
CPoutRF
OSCout*
FLoutRF
Ftest/LD
CPoutIF
ENOSC
FLoutIF
FinRF*
VddRF
VccRF
OSCin
Name
FinRF
DATA
VddIF
VccIF
FinIF
GND
GND
GND
GND
GND
CLK
Pin
EN
LE
I/O
I/O
O
O
O
O
O
-
-
-
I
I
I
I
I
I
-
-
-
I
-
I
-
RF charge pump output.
Ground
RF Ground
Ground for RF PLL digital circuitry.
RF prescaler input. Small signal input from the VCO.
RF prescaler complimentary input. For single-ended operation, a bypass capacitor should
be placed as close as possible to this pin and be connected directly to the ground plane.
RF PLL power supply voltage input. Must be equal to VccIF . May range from 2.25V to
2.75V. Bypass capacitors should be placed as close as possible to this pin and be
connected directly to the ground plane.
Chip enable input. High impedance CMOS input. When EN is high, the chip is powered
up, otherwise it is powered down.
This pin should be grounded for normal operation.
MICROWIRE Clock. High impedance CMOS Clock input. Data for the various counters is
clocked into the 24 bit shift register on the rising edge.
MICROWIRE Data. High impedance binary serial data input.
MICROWIRE Load Enable. High impedance CMOS input. Data stored in the shift
registers is loaded into the internal latches when LE goes HIGH
Test frequency output / Lock Detect
Digital power supply for IF PLL
IF power supply voltage input. Must be equal to VccRF. Input may range from 2.25 V to
2.75 V. Bypass capacitors should be placed as close as possible to this pin and be
connected directly to the ground plane.
Ground for RF PLL digital circuitry.
IF prescaler input. Small signal input from the VCO.
Digital ground for IF PLL
IF PLL charge pump output
IF Fastlock Output. Also functions as Programmable TRI-STATE CMOS output.
Complementary reference input or oscillator output.
Reference input
Digital power supply for RF PLL
RF Fastlock Output. Also functions as Programmable TRI-STATE CMOS output.
24-Pin CSP (SLE) Package
2
Pin Description
20059322