SI5325B-C-GM Silicon Laboratories Inc, SI5325B-C-GM Datasheet - Page 22

• Manufacturer Part Number: SI5325B-C-GM
• Description: IC UP-PROG CLK MULTIPLIER 36-QFN
• Manufacturer: Silicon Laboratories Inc
• Type: Clock Multiplierr

Specifications of SI5325B-C-GM

• Number Of Circuits: 1
• Package / Case: 36-QFN
• Pll: Yes
• Input: Clock
• Output: CML, CMOS, LVDS, LVPECL
• Ratio - Input:output: 2:2
• Differential - Input:output: Yes/Yes
• Frequency - Max: 808MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 1.71 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Frequency-max: 808MHz
• Maximum Input Frequency: 710 MHz
• Minimum Input Frequency: 10 MHz
• Output Frequency Range: 10 MHz to 808 MHz
• Supply Voltage (max): 3.63 V
• Supply Voltage (min): 1.71 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 1.8 V, 2.5 V, 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si5325
Reset value = 0010 1100
22
Register 19.
Name
Type
Bit
7:5
6:5
4:3
2:0
Bit
VALTIME [1:0] VALTIME [1:0].
FOS_EN
FOS_THR
Reserved
FOS_EN
R/W
Name
D7
[1:0]
FOS_EN.
Frequency Offset Enable globally disables FOS. See the individual FOS enables
(FOSX_EN, register 139).
0: FOS disable
1: FOS enabled by FOSx_EN
FOS_THR [1:0].
Frequency Offset at which FOS is declared:
00: ± 11 to 12 ppm (Stratum 3/3E compliant, with a Stratum 3/3E used for REFCLK
01: ± 48 to 49 ppm (SMC)
10: ± 30 ppm (SONET Minimum Clock (SMC), with a Stratum 3/3E used for REFCLK.
11: ± 200 ppm
Sets amount of time for input clock to be valid before the associated alarm is removed.
00: 2 ms
01: 100 ms
10: 200 ms
11: 13 seconds
Reserved.
D6
FOS_THR [1:0]
R/W
D5
Preliminary Rev. 0.4
D4
VALTIME [1:0]
R/W
Function
D3
D2
Reserved
D1
R
D0