SI5325B-C-GM Silicon Laboratories Inc, SI5325B-C-GM Datasheet - Page 48

IC UP-PROG CLK MULTIPLIER 36-QFN

SI5325B-C-GM

Manufacturer Part Number
SI5325B-C-GM
Description
IC UP-PROG CLK MULTIPLIER 36-QFN
Manufacturer
Silicon Laboratories Inc
Type
Clock Multiplierr
Datasheet

Specifications of SI5325B-C-GM

Number Of Circuits
1
Package / Case
36-QFN
Pll
Yes
Input
Clock
Output
CML, CMOS, LVDS, LVPECL
Ratio - Input:output
2:2
Differential - Input:output
Yes/Yes
Frequency - Max
808MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
1.71 V ~ 3.63 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
808MHz
Maximum Input Frequency
710 MHz
Minimum Input Frequency
10 MHz
Output Frequency Range
10 MHz to 808 MHz
Supply Voltage (max)
3.63 V
Supply Voltage (min)
1.71 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Si5325
6. Package Outline: 36-Pin QFN
Figure 4 illustrates the package details for the Si5325. Table 6 lists the values for the dimensions shown in the
illustration.
48
Notes:
Symbol
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to JEDEC outline MO-220, variation VJJD.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body
A1
D2
E2
A
D
E
b
e
Components.
0.80
0.00
0.18
3.95
3.95
Min
Millimeters
6.00 BSC
0.50 BSC
6.00 BSC
Figure 4. 36-Pin Quad Flat No-lead (QFN)
Nom
0.85
0.02
0.25
4.10
4.10
Table 6. Package Dimensions
Max
0.90
0.05
0.30
4.25
4.25
Preliminary Rev. 0.4
Symbol
aaa
bbb
ddd
eee
ccc
L
0.50
Min
Millimeters
Nom
0.60
Max
0.70
0.10
0.10
0.08
0.10
0.05
12º

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