PI6C39911-2JE Pericom Semiconductor, PI6C39911-2JE Datasheet - Page 10

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PI6C39911-2JE

Manufacturer Part Number
PI6C39911-2JE
Description
IC PROG SKEW CLOCK DRIVER 32PLCC
Manufacturer
Pericom Semiconductor
Series
SuperClock®r
Type
Clock Bufferr
Datasheet

Specifications of PI6C39911-2JE

Pll
Yes
Input
LVTTL
Output
LVTTL
Number Of Circuits
1
Ratio - Input:output
1:8
Differential - Input:output
No/No
Frequency - Max
133MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
2.97 V ~ 3.63 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-PLCC
Frequency-max
133MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI6C39911-2JE
Manufacturer:
Pericom
Quantity:
10 000
Part Number:
PI6C39911-2JEX
Manufacturer:
PERICOM
Quantity:
20 000
Figure 8 shows the PI6C39911 connected in series to construct a zero
skew clock distribution tree between boards. Delays of the down
stream clock buffers can be programmed to compensate for the wire
length (i.e., select negative skew equal to the wire delay) necessary
to connect them to the master clock source, approximating a zero-
08-0298
System
Clock
FB
REF
FS
4F0
4F1
3F0
3F1
2F0
2F1
1F0
1F1
TEST
4Q0
4Q1
3Q0
3Q1
2Q0
2Q1
1Q0
1Q1
Figure 8. Board-to-Board Clock Distribution
REF
1 0
delay clock tree. Cascaded clock buffers will accumulate low
frequency jitter because of the non-ideal filtering characteristics of
the PLL filter. It is recommended that not more than two clock buffers
be connected in series.
L3
L4
L1
L2
Programmable Skew Clock Buffer - SuperClock
Z
3.3V High Speed LVTTL or Balanced Output
0
Z
Z
Z
0
0
FB
REF
FS
4F0
4F1
3F0
3F1
2F0
2F1
1F0
1F1
TEST
0
LOAD
LOAD
LOAD
4Q0
4Q1
3Q0
3Q1
2Q0
2Q1
1Q0
1Q1
LOAD
LOAD
PS8497I
PI6C39911
11/06/08
® ® ® ® ®

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