LMX2332USLBX National Semiconductor, LMX2332USLBX Datasheet - Page 43

IC FREQ SYNTH DUAL 24LAMINATECSP

LMX2332USLBX

Manufacturer Part Number
LMX2332USLBX
Description
IC FREQ SYNTH DUAL 24LAMINATECSP
Manufacturer
National Semiconductor
Series
PLLatinum™r
Type
PLL Frequency Synthesizerr
Datasheet

Specifications of LMX2332USLBX

Pll
Yes with Bypass
Input
CMOS, TTL
Output
CMOS
Number Of Circuits
1
Ratio - Input:output
3:1
Differential - Input:output
Yes/No
Frequency - Max
1.2GHz, 600MHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-Laminate CSP
Frequency-max
1.2GHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
LMX2332USLBXTR
Reg. Most Significant Bit
Divide Ratio
IF
N
Divide
Ratio
2.0 Programming Description
2.4.4 TRI-STATE ID
The TRI-STATE ID
state. This happens asynchronously with the change in the TRI-STATE ID
Furthermore, the TRI-STATE ID
powerdown mode.
2.5 IF N REGISTER
The IF N register contains the IF N_CNTRA, IF N_CNTRB, PRE IF, and PWDN IF control words. The IF N_CNTRA and IF
N_CNTRB control words are used to setup the programmable feedback divider. The detailed description and programming
information for each control word is discussed in the following sections.
2.5.1 IF N_CNTRA[6:0]
The IF N_CNTRA control word is used to setup the IF synthesizer’s A counter. The A counter is a 7-bit swallow counter used in
the programmable feedback divider. The IF N_CNTRA control word can be programmed to values ranging from 0 to 15. The three
most significant bits are ‘don’t care bits’ in this case.
2.5.2 IF N_CNTRB[10:0]
The IF N_CNTRB control word is used to setup the IF synthesizer’s B counter. The B counter is an 11-bit programmable binary
counter used in the programmable feedback divider. The IF N_CNTRB control word can be programmed to values ranging from
3 to 2047.
2.5.3 PRE IF
The IF synthesizer utilizes a selectable dual modulus prescaler.
2047
TRI-STATE ID
3
4
PWDN
15
Control Bit
21
Control Bit
0
1
IF
PRE IF
PRE
20
IF
10
0
0
1
o
19
IF
o
IF bit allows the charge pump to be switched between a normal operating mode and a high impedance output
o
X
X
X
6
18
IF
9
0
0
1
Register Location
Register Location
17
IF Synthesizer Swallow Counter (A Counter)
IF Synthesizer Prescaler Select
IF Synthesizer Programmable Binary Counter (B Counter)
IF Synthesizer Charge Pump Tri-state Current
o
IF R[19]
IF N[20]
16
IF bit operates in conjuction with the PWDN IF bit to set a synchronous or an asynchronous
IF N_CNTRB[10:0]
8
0
0
1
X
X
X
5
15
14
7
0
0
1
13
SHIFT REGISTER BIT LOCATION
(Continued)
IF Charge Pump
TRI-STATE Current
IF Prescaler Select
X
X
X
4
Data Field
12
Description
6
0
0
1
Description
IF N_CNTRB[10:0]
11
IF N_CNTRA[6:0]
43
10
5
0
0
1
3
0
0
1
o
9
IF bit.
IF Charge Pump
Normal Operation
8/9 Prescaler
Selected
4
0
0
1
8
7
2
0
0
1
IF N_CNTRA[6:0]
0
0
3
0
0
1
6
5
Function
Function
IF N[9:19]
2
0
1
1
4
1
0
0
1
IF R[19]
IF Charge Pump
Output in High
Impedance State
16/17 Prescaler
Selected
IF N[2:8]
Least Significant Bit
IF N[20]
3
1
1
0
1
2
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1
1
Address
1
0
0
0
1
1
Field
0
1
0
1
0
1

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