SI5326C-B-GM Silicon Laboratories Inc, SI5326C-B-GM Datasheet - Page 7

• Manufacturer Part Number: SI5326C-B-GM
• Description: IC ANY-RATE MULTI/ATTEN 36QFN
• Manufacturer: Silicon Laboratories Inc
• Type: Clock Multiplierr

Specifications of SI5326C-B-GM

• Number Of Circuits: 1
• Package / Case: 36-QFN
• Pll: Yes
• Input: Clock
• Output: CML, CMOS, LVDS, LVPECL
• Ratio - Input:output: 2:2
• Differential - Input:output: Yes/Yes
• Frequency - Max: 346MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 1.62 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Frequency-max: 346MHz
• Maximum Input Frequency: 710 MHz
• Minimum Input Frequency: 0.002 MHz
• Output Frequency Range: 0.002 MHz to 1400 MHz
• Supply Voltage (max): 3.63 V
• Supply Voltage (min): 1.71 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 1.8 V, 2.5 V, 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2. Pin Descriptions: Si5326
Pin numbers are preliminary and subject to change.
Note: Internal register names are indicated by underlined italics, e.g. INT_PIN. See Si5326 Register Map.
2, 9, 14,
30, 33
Pin #
1
3
Pin Name
INT_C1B
RST
NC
I/O
—
O
I
Signal Level
INT_C1B
LVCMOS
LVCMOS
GND
VDD
RST
C2B
NC
XB
NC
—
XA
1
2
3
4
5
6
7
8
9
36
10 11 12 13 14 15 16 17
35
Confidential Rev. 0.2
External Reset.
Active low input that performs external hardware reset of device.
Resets all internal logic to a known state and forces the device reg-
isters to their default value. Clock outputs are tristated during reset.
After rising edge of RST signal, the Si5326 will perform an internal
self-calibration.
This pin has a weak pull-up.
No Connect.
This pin must be left unconnected for normal operation.
Interrupt/CKIN1 Invalid Indicator.
This pin functions as a device interrupt output or an alarm output
for CKIN1. If used as an interrupt output, INT_PIN must be set to 1.
The pin functions as a maskable interrupt output with active polar-
ity controlled by the INT_POL register bit.
If used as an alarm output, the pin functions as a LOS (and option-
ally FOS) alarm indicator for CKIN1. Set CK1_BAD_PIN = 1 and
INT_PIN = 0.
0 = CKIN1 present.
1 = LOS (FOS) on CKIN1.
The active polarity is controlled by CK_BAD_POL. If no function is
selected, the pin tristates.
34
33
GND
Pad
32
31
30
29
28
18
27
26
25
24
23
22
21
20
19
SDI
A2_SS
A1
A0
SDA_SDO
SCL
CS_CA
INC
DEC
Description
Si5326
7