PCF8563TS/4,118 NXP Semiconductors, PCF8563TS/4,118 Datasheet - Page 18

IC REAL TIME CLK/CALENDAR 8TSSOP

PCF8563TS/4,118

Manufacturer Part Number
PCF8563TS/4,118
Description
IC REAL TIME CLK/CALENDAR 8TSSOP
Manufacturer
NXP Semiconductors
Type
Clock/Calendarr
Datasheet

Specifications of PCF8563TS/4,118

Package / Case
8-TSSOP
Time Format
HH:MM:SS (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Function
Clock/Calendar/Alarm/Timer Interrupt
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Rtc Bus Interface
Serial (2-Wire, I2C)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-3615 - DEMO BOARD I2C
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4517-2
935279522118
PCF8563TS-T
PCF8563TS-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCF8563TS/4,118
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
PCF8563
Product data sheet
Fig 11. STOP bit functional diagram
OSCILLATOR
8.10 STOP bit function
Repeat steps 7 and 8 for additional increments.
The function of the STOP bit is to allow for accurate starting of the time circuits. The STOP
bit function will cause the upper part of the prescaler (F
thus no 1 Hz ticks will be generated (see
will not increment until the STOP bit is released (see
The STOP bit function will not affect the output of 32.768 kHz on CLKOUT, but will stop
the generation of 1.024 kHz, 32 Hz, and 1 Hz.
The lower two stages of the prescaler (F
is asynchronous to the crystal oscillator, the accuracy of re-starting the time circuits will be
between zero and one 8.192 kHz cycle (see
5. Apply 32 clock pulses to CLKOUT.
6. Read time registers to see the first change.
7. Apply 64 clock pulses to CLKOUT.
8. Read time registers to see the second change.
Fig 12. STOP bit release timing
stop released
F
All information provided in this document is subject to legal disclaimers.
8192 Hz
0
Rev. 8 — 18 November 2010
F
OSCILLATOR STOP
DETECTOR
1
RESET
F
2
0
Figure
and F
Figure
0 μs to 122 μs
reset
32768 Hz
1024 Hz
1
11). The time circuits can then be set and
32 Hz
) are not reset; and because the I
1 Hz
12).
RESET
Figure 12
F
2
13
to F
14
CLKOUT source
) to be held in reset and
Real-time clock/calendar
and
RESET
F
14
Table
PCF8563
001aaf912
© NXP B.V. 2010. All rights reserved.
013aaa089
1 Hz tick
STOP
26).
2
C-bus
18 of 45

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