PCF8563TS/4,118 NXP Semiconductors, PCF8563TS/4,118 Datasheet - Page 19

IC REAL TIME CLK/CALENDAR 8TSSOP

PCF8563TS/4,118

Manufacturer Part Number
PCF8563TS/4,118
Description
IC REAL TIME CLK/CALENDAR 8TSSOP
Manufacturer
NXP Semiconductors
Type
Clock/Calendarr
Datasheet

Specifications of PCF8563TS/4,118

Package / Case
8-TSSOP
Time Format
HH:MM:SS (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Function
Clock/Calendar/Alarm/Timer Interrupt
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Rtc Bus Interface
Serial (2-Wire, I2C)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-3615 - DEMO BOARD I2C
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4517-2
935279522118
PCF8563TS-T
PCF8563TS-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCF8563TS/4,118
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
Table 26.
[1]
PCF8563
Product data sheet
Bit
STOP
Clock is running normally
0
STOP bit is activated by user. F
1
New time is set by user
1
STOP bit is released by user
0
F
0
is clocked at 32.768 kHz.
Prescaler bits
F
01-0 0001 1101 0100
XX-0 0000 0000 0000
XX-0 0000 0000 0000
XX-0 0000 0000 0000
XX-1 0000 0000 0000
XX-0 1000 0000 0000
XX-1 1000 0000 0000
:
11-1 1111 1111 1110
00-0 0000 0000 0001
10-0 0000 0000 0001
:
11-1 1111 1111 1111
00-0 0000 0000 0000
10-0 0000 0000 0000
:
11-1 1111 1111 1110
00-0 0000 0000 0001
First increment of time circuits after STOP bit release
0
F
1
-F
8.11 Reset
2
to F
14
The first increment of the time circuits is between 0.507813 s and 0.507935 s after STOP
bit is released. The uncertainty is caused by the prescaler bits F
(see
The PCF8563 includes an internal reset circuit which is active whenever the oscillator is
stopped. In the reset state the I
all registers are set according to
reset.
Table
[1]
0
F
1
26) and the unknown state of the 32 kHz clock.
are not reset and values cannot be predicted externally
1 Hz tick
013aaa076
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 18 November 2010
Time
hh:mm:ss
12:45:12
12:45:12
08:00:00
08:00:00
08:00:00
08:00:00
08:00:00
:
08:00:00
08:00:01
08:00:01
:
08:00:01
08:00:01
08:00:01
:
08:00:01
08:00:02
2
C-bus logic is initialized including the address pointer and
Table
27. I
Comment
prescaler counting normally
prescaler is reset; time circuits are frozen
prescaler is reset; time circuits are frozen
prescaler is now running
-
-
-
:
-
0 to 1 transition of F
-
:
-
-
-
:
-
0 to 1 transition of F
2
C-bus communication is not possible during
14
14
increments the time circuits
increments the time circuits
Real-time clock/calendar
0
and F
PCF8563
© NXP B.V. 2010. All rights reserved.
1
not being reset
19 of 45

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