ISL12026IBZ Intersil, ISL12026IBZ Datasheet
ISL12026IBZ
Specifications of ISL12026IBZ
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ISL12026IBZ Summary of contents
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... Ordering Information TEMP PART PART V RANGE DD NUMBER MARKING RANGE (°C) ISL12026IBZ 12026 IBZ 2.7V to - SOIC 5.5V (See Note) ISL12026IVZ 2026 IVZ - TSSOP 2.7V to 5.5V (See Note) NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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Block Diagram X1 32.768kHz X2 IRQ/F OUT SELECT CONTROL SERIAL SCL DECODE INTERFACE LOGIC DECODER SDA 8 Pin Descriptions PIN NUMBER SOIC TSSOP SYMBOL The X1 pin is the input of an inverting amplifier and is intended ...
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Absolute Maximum Ratings IRQ/F Voltage SCL, SDA, and DD BAT (respect to ground ...
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EEPROM Specifications SYMBOL PARAMETER EEPROM Endurance EEPROM Retention 2 Serial Interface (I C) Specifications DC Electrical Specifications SYMBOL PARAMETER V SDA, and SCL Input Buffer LOW IL Voltage V SDA, and SCL Input Buffer HIGH IH Voltage Hysteresis SDA and ...
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AC Electrical Specifications (Continued) SYMBOL PARAMETER t STOP Condition Hold Time for HD:STO Read, or Volatile Only Write t Output Data Hold Time DH Cb Capacitive Loading of SDA or SCL Total on-chip and off-chip. Cpin SDA, and SCL Pin ...
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Typical Performance Curves 4.00 BSW = 3.50 SCL,SDA pullups = 0V 3.00 2.50 2.00 1.50 SCL,SDA pullups = Vbat 1.00 0.50 BSW = 0.00 1.8 2.3 2.8 3.3 3.8 Vbat (V) FIGURE 1. I ...
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Description The ISL12026 device is a Real Time Clock with clock/ calendar, two polled alarms with integrated 512x8 EEPROM, oscillator compensation, and battery backup switch. The oscillator uses an external, low-cost 32.768kHz crystal. All compensation and trim components are integrated ...
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... For example, a >20ppm frequency deviation translates into an accuracy of >1 minute per month. These parameters are available from the crystal manufacturer. Intersil’s RTC family provides on- chip crystal compensation networks to adjust load- capacitance to tune oscillator frequency from -34ppm to +80ppm when using a 12 ...
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Hour Time If the MIL bit of the HR register is 1, the RTC uses a 24-hour format. If the MIL bit is 0, the RTC uses a 12-hour format and H21 bit functions as an AM/PM indicator with ...
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REG ADDR. TYPE NAME 7 003F Status SR BAT 0037 RTC Y2K 0 (SRAM) 0036 DW 0 0035 YR Y23 0034 MO 0 0033 DT 0 0032 HR MIL 0031 MN 0 0030 SC 0 0014 Control PWR SBIB (EEPROM) ...
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TABLE 3. PROTECTED ADDRESSES ISL12026 None (Default 180 – 1FF 100 – 1FF 000 – 1FF 000 – 03F ...
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DTR Register - DTR2, DTR1, DTR0: Digital Trimming Register The digital trimming Bits DTR2, DTR1 and DTR0 adjust the number of counts per second and average the ppm error to achieve better accuracy. DTR2 is a sign bit. DTR2 = ...
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... Many types of batteries can be used with Intersil RTC products. For example, 3.0V or 3.6V Lithium batteries are appropriate, and battery sizes are available that can power an Intersil RTC device for years. Another option is to use a SuperCap for applications where V for month. See the Applications Section for more information ...
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These two power control situations are illustrated in Figures 9 and 10. BATTERY BACKUP MODE TRIP V BAT BAT BATHYS FIGURE 9. BATTERY SWITCHOVER WHEN V BATTERY BACKUP MODE BAT V ...
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SCL SDA SCL SDA SCL FROM MASTER DATA OUTPUT FROM TRANSMITTER DATA OUTPUT FROM RECEIVER FIGURE 14. ACKNOWLEDGE RESPONSE FROM RECEIVER Device Addressing Following a start condition, the master must output a Slave Address Byte. The first four bits of ...
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DEVICE IDENTIFIER ARRAY CCR FIGURE 15. SLAVE ADDRESS, WORD ADDRESS, AND DATA BYTES Write Operations Byte Write For a write operation, the device requires the Slave Address Byte and the ...
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S T SIGNALS FROM A THE MASTER R SLAVE T ADDRESS SDA BUS 1 SIGNALS FROM THE SLAVE After the receipt of each byte, the ISL12026 responds with an acknowledge, and the address is internally incremented by one. The address ...
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Refer to Figure 19 for the address, acknowledge, and data transfer sequence SIGNALS FROM SLAVE A THE MASTER R ADDRESS T SDA BUS ...
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... In addition to the analog compensation afforded by the adjustable load capacitance, a digital compensation feature is available for the Intersil RTC family. There are three bits known as the Digital Trimming Register or DTR, and they operate by adding or skipping pulses in the clock signal. The range provided is ±30ppm in increments of 10ppm. The default setting is 0ppm ...
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... EEPROM. Extremely low overall temperature drift is possible with this method. The Intersil evaluation board contains the circuitry necessary to implement this control. For more detailed operation see Intersil’s application note AN154 on Intersil’ ...
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... Backup Battery Operation Many types of batteries can be used with the Intersil RTC products. 3.0V or 3.6V Lithium batteries are appropriate, and sizes are available that can power a Intersil RTC device for years. Another option is to use a supercapacitor for applications where V may disappear intermittently for DD short periods of time ...
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AL0 bit in the status register to “1” and also bringing the IRQ/F low. Example 2 – Pulsed interrupt once per minute (IM = ”1”) Interrupts at one minute intervals when ...
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Small Outline Plastic Packages (SOIC) N INDEX 0.25(0.010) H AREA E - SEATING PLANE - -C- α 0.10(0.004) 0.25(0.010 NOTES: 1. Symbols are defined in the ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...