PCF2123BS/1,512 NXP Semiconductors, PCF2123BS/1,512 Datasheet - Page 27

• Manufacturer Part Number: PCF2123BS/1,512
• Description: IC CLOCK HVQFN16
• Manufacturer: NXP Semiconductors
• Type: Clock/Calendar/Alarmr

Specifications of PCF2123BS/1,512

• Package / Case: 16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 1.1 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Function: Clock, Calendar, Alarm, Watchdog
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.1 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: SPI
• Supply Current: 250 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-5051-5; 935286382512

NXP Semiconductors
PCF2123
Product data sheet
8.7.1 Minute and second interrupts
8.7.2 Countdown timer interrupts
The pulse generator for the minute and second interrupt operates from an internal 64 Hz
clock and consequently generates a pulse of
If the MSF flag is cleared before the end of the INT pulse, then the INT pulse is shortened.
This allows the source of a system interrupt to be cleared immediately it is serviced, i.e.,
the system does not have to wait for the completion of the pulse before continuing; see
Figure
The timing shown for clearing bit MSF in
interrupt mode i.e. when bit TI_TP = 0, INT may be shortened by setting both MI and SI or
MSF to logic 0.
The generation of interrupts from the countdown timer is controlled via bit TIE.
The pulse generator for the countdown timer interrupt also uses an internal clock, but this
time it is dependent on the selected source clock for the countdown timer and on the
countdown value n. As a consequence, the width of the interrupt pulse varies (see
Table
Table 34.
[1]
If the TF flag is cleared before the end of the INT pulse, then the INT pulse is shortened.
This allows the source of a system interrupt to be cleared immediately it is serviced, i.e.,
the system does not have to wait for the completion of the pulse before continuing (see
Figure
Source clock (Hz)
4096
64
1
1
Fig 17. Example of shortening the INT pulse by clearing the MSF flag

60
n = loaded countdown value. Timer stopped when n = 0.
(1) Indicates normal duration of INT pulse (bit TI_TP = 1)
34).
17. Instructions for clearing MSF are given in
18). Instructions for clearing MSF can be found in
INT operation (bit TI_TP = 1)
seconds counter
All information provided in this document is subject to legal disclaimers.
instruction
Rev. 4 — 22 December 2010
MSF
SCL
INT
58
INT period (s)
n = 1
1
1
1
1




8192
128
64
64
59
[1]
Figure 17
CLEAR INSTRUCTION
1

64
second in duration.
is also valid for the non-pulsed
Section
Section
SPI Real time clock/calendar
8th clock
n > 1
1
1
1
1
8.6.5.




4096
64
64
64
8.6.5.
001aaf908
PCF2123
© NXP B.V. 2010. All rights reserved.
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