PCF2123BS NXP [NXP Semiconductors], PCF2123BS Datasheet
PCF2123BS
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PCF2123BS Summary of contents
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PCF2123 SPI Real time clock/calendar Rev. 01 — 19 November 2008 1. General description The PCF2123 is a CMOS real time clock and calendar optimized for low power applications. Data is transferred serially via a Serial Peripheral Interface bus (SPI-bus) ...
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... Table 1. Type number PCF2123TS PCF2123BS PCF2123U [1] Sawn wafer on Film Frame Carrier (FFC); 200 m thickness. 5. Marking Table 2. Type number PCF2123TS PCF2123BS PCF2123U PCF2123_1 Product data sheet Ordering information Package Name Description TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm HVQFN16 plastic thermal enhanced very thin quad fl ...
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NXP Semiconductors 6. Block diagram OSCI OSCILLATOR 32.768 kHz OSCO MONITOR TEST POWER ON RESET WATCH DOG SDO SDI SPI INTERFACE SCL CE PCF2123 Fig 1. Block diagram of PCF2123 PCF2123_1 Product data sheet DIVIDER OFFSET ...
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... V DD OSCO 13 CLKOUT 12 CLKOE TEST 11 n.c. 10 SCL 9 SDI 8 SDO Figure 29. For mechanical details, see Fig 3. Pinning diagram of PCF2123BS (HVQFN16) OSCI 7 OSCO 8 PCF2123U/10 TEST 9 INT Figure 31 Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar 1 12 CLKOUT ...
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NXP Semiconductors 7.2 Pin description Table 3. Pin description Symbol Pin TSSOP14 HVQFN16 OSCI 1 16 OSCO 14, 15 TEST 4 2 INT [ ...
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NXP Semiconductors 9. Functional description The PCF2123 contains sixteen 8-bit registers with an auto-incrementing address counter, an on-chip 32.768 kHz oscillator with two integrated load capacitors, a frequency divider which provides the source clock for the Real Time Clock (RTC), ...
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NXP Semiconductors 9.1.1 Power consumption with respect to quartz series resistance The series resistance acts as a loss element. Low R further. 250 ( (nA) 210 170 130 90 50 Configuration: CLKOUT disabled, V (1) I Fig 6. ...
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NXP Semiconductors 9.1.2 Power consumptions with respect to timer mode Four source clocks are possible for the timer. The 4.096 kHz source clock will add the greatest part to the power consumption. The selection ...
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NXP Semiconductors 9.2 Register overview 16 registers are available. The time registers are encoded in the binary coded decimal format (BCD) to simplify application use. Other registers are either bit-wise or standard binary. Table 4. Registers overview Bit positions labelled ...
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NXP Semiconductors 9.3 Control registers 9.3.1 Register Control_1 Table 5. Bit Symbol 7 EXT_TEST STOP 12_24 1 CIE 0 - [1] To prevent an accidental software reset, 01011000 (58h) must be sent ...
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NXP Semiconductors 9.3.2 Register Control_2 Table 6. Bit Symbol MSF 4 TI_TP AIE 0 TIE 9.4 OS flag The PCF2123 includes a flag (bit OS) which is set whenever the ...
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NXP Semiconductors V DD oscillation OS flag Fig 9. OS flag The oscillator may be stopped, for example, by grounding one of the oscillator pins, OSCI or OSCO. The oscillator is also considered to be stopped during the time between ...
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NXP Semiconductors Table 7. Bits labeled as - are not implemented. Bits labeled as X are undefined at power-on and unchanged by subsequent resets. Address Register name 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch ...
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NXP Semiconductors 9.6 Time and date function The majority of the registers are coded in the Binary Coded Decimal (BCD) format. BCD is used to simplify application use. An example is shown for the Minutes register in Table 8. Table ...
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NXP Semiconductors Table 11. Bit Symbol 7 and hour mode 5 AMPM HOURS 24 hour mode HOURS [1] Values shown in decimal. [2] Hour mode is set by the 12_24 bit ...
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NXP Semiconductors Table 15. Bit Symbol MONTHS [1] Values shown in decimal. Table 16. Month January February March April May June July August September October November December Table 17. Bit Symbol 7 to ...
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NXP Semiconductors 9.6.1 Data flow Figure 11 Fig 11. Data flow for the time function In order to read the correct time it is important to read all time registers in one access i.e. seconds up to years. If the ...
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NXP Semiconductors Table 19. Bit Symbol 7 AEN_H hour mode 5 AMPM HOUR_ALARM 24 hour mode HOUR_ALARM [1] Values shown in decimal. Table 20. Bit Symbol 7 AEN_D ...
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NXP Semiconductors (1) Only when all enabled alarm settings are matching. Fig 12. Alarm function block diagram The generation of interrupts from the alarm function is described in 9.7.1 Alarm flag When all enabled comparisons first match, the alarm flag ...
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NXP Semiconductors To prevent the timer flags being overwritten while clearing AF, a logical AND is performed during a write access. Writing a logic 1 will cause the flag to maintain its value, whereas writing a logic 0 will cause ...
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NXP Semiconductors 9.8.1 Minute and second interrupt The minute and second interrupts (bits MI and SI) are pre-defined timers for generating periodic interrupts. The timers can be enabled independently from one another. However, a minute interrupt enabled on top of ...
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NXP Semiconductors The duration of both of these timers will be affected by the register Offset_register (see Section 9.11). Only when the Offset_register has the value 00h will the periods be consistent. 9.8.2 Countdown timer function The 8-bit countdown timer ...
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NXP Semiconductors If a new value written before the end of the current timer period, then this value will take immediate effect. NXP does not recommend changing n without first disabling the counter (by setting bit TE ...
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NXP Semiconductors 9.8.3 Timer flags When a minute or second interrupt occurs, bit MSF is set to logic 1. Similarly, at the end of a timer countdown or alarm event, bit are set to logic 1. These ...
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NXP Semiconductors SECONDS COUNTER MINUTES COUNTER MI from interface: clear MSF TE COUNTDOWN COUNTER from interface: clear TF set alarm flag, AF from interface: clear AF offset circuit: add/substract 1/64 Hz pulse from interface: set CIE When bits SI, MI, ...
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NXP Semiconductors (1) Indicates normal duration of INT pulse (bit TI_TP = 1) Fig 17. Example of shortening the INT pulse by clearing the MSF flag The timing shown for clearing bit MSF in interrupt mode i.e. when bit TI_TP ...
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NXP Semiconductors (1) Indicates normal duration of INT pulse (bit TI_TP = 1). Fig 18. Example of shortening the INT pulse by clearing the TF flag The timing shown for clearing bit TF in mode i.e. when bit TI_TP = ...
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NXP Semiconductors 9.10 Clock output A programmable square wave is available at pin CLKOUT. Operation is controlled by the COF[2:0] bits in the register Timer_clkout. Frequencies of 32.768 kHz (default) down can be generated for use as ...
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NXP Semiconductors Table 36. OFFSET[6: ...
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NXP Semiconductors Table 38. Correction value + + + + + + [1] Example is given in a time range ...
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NXP Semiconductors Table 39. Frequency (Hz) CLKOUT 32768 16384 8192 4096 2048 1024 1 Time source clock 4096 9.12 External clock test mode A test mode is available which allows for on-board testing. In this mode ...
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NXP Semiconductors Operation example: 1. Set EXT_TEST test mode (register Control_1, bit EXT_TEST = 1). 2. Set STOP (Control_1, bit STOP = 1). 3. Clear STOP (Control_1, bit STOP = 0). 4. Set time registers to desired value. 5. Apply ...
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NXP Semiconductors Fig 21. STOP bit release timing The first increment of the time circuits is between 0.499888 s and 0.500000 s after STOP bit is released. The uncertainty is caused by the prescaler bits F (see Table Table 40. ...
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NXP Semiconductors 9.14 3-line serial interface Data transfer to and from the device is made via a 3-wire SPI-bus (see data lines for input and output are split. The data input and output lines can be connected together to facilitate ...
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NXP Semiconductors Table 42. Bit Symbol 7 R Figure 24, the register Seconds is set to 45 seconds and the register Minutes is set to 10 minutes. R/W addr 02 b7 ...
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NXP Semiconductors R/W addr SCL SDI SDO CE address xx counter Fig 25. Serial bus read example 9.14.1 Interface watchdog timer During read/write operations, the time counting circuits are ...
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NXP Semiconductors The watchdog is implemented to prevent the excessive loss of time due to interface access failure e.g. if main power is removed from a battery backed-up system during an interface access. Each time the watchdog period is exceeded, ...
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NXP Semiconductors 10. Limiting values Table 43. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol tot T amb V esd stg ...
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NXP Semiconductors 11. Static characteristics Table 44. Static characteristics amb specified. Symbol Parameter Supplies V supply voltage DD I supply current DD Inputs V LOW-level input ...
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NXP Semiconductors Table 44. Static characteristics …continued amb specified. Symbol Parameter I leakage current L R pull-down resistance pd C input capacitance i Outputs V output ...
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NXP Semiconductors 12. Dynamic characteristics Table 45. SPI-bus characteristics +85 C. All timing values are valid within the operating supply voltage and temperature range and SS amb referenced to V and ...
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NXP Semiconductors CE t su(CE) SCL WRITE t SU;DAT t HD;DAT SDI R/W SA2 Hi Z SDO READ SDI SDO Fig 27. SPI-bus timing PCF2123_1 Product data sheet t t clk( 80% 20% ...
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NXP Semiconductors 13. Application information A 1 farad super capacitor combined with a low V supply. With the RTC in its minimum power configuration i.e. timer off and CLKOUT off, the RTC may operate for weeks. Fig 28. Typical application ...
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NXP Semiconductors 14. Package outline TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT ...
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... A UNIT max. 0.05 0.30 3 0.2 0.00 0.18 2.9 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION IEC SOT758 Fig 30. Package outline of PCF2123BS (SOT758-1) PCF2123_1 Product data sheet 1 ...
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NXP Semiconductors 15. Bare die outline Wire bond die; 12 bonding pads; 1.492 x 1.449 x 0. DIMENSIONS (mm are the original dimensions) (1) (1) UNIT ...
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NXP Semiconductors Fig 32. Alignment mark PCF2123_1 Product data sheet REF 001aai565 Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar © NXP B.V. 2008. All rights reserved ...
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NXP Semiconductors 16. Handling information Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe you must take normal precautions appropriate to handling MOS devices; see JESD625-A and/or IEC61340-5 . PCF2123_1 Product data sheet ...
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NXP Semiconductors 17. Packing information metal frame 214.50 mm 193.50 mm 1.492 mm 1 1.449 mm 1 straight edge of the wafer detail X Fig 33. PCF2123U/10, sawn wafer on film frame carrier; 200 m thickness PCF2123_1 Product data sheet ...
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NXP Semiconductors 18. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 18.1 Introduction ...
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NXP Semiconductors 18.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including ...
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NXP Semiconductors temperature MSL: Moisture Sensitivity Level Fig 34. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 19. Abbreviations Table 49. Acronym CMOS BCD ...
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NXP Semiconductors 21. Legal information 21.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...
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NXP Semiconductors 23. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...