DS32B35-33IND# Maxim Integrated Products, DS32B35-33IND# Datasheet - Page 11

• Manufacturer Part Number: DS32B35-33IND#
• Description: IC RTC W/TCXO 20-SOIC
• Manufacturer: Maxim Integrated Products
• Type: Clock/Calendar/TCXO/Crystal/FRAMr

Specifications of DS32B35-33IND#

• Memory Size: 16K (2K x 8)
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Function: Clock/Calendar
• Rtc Memory Size: 2048 B
• Supply Voltage (max): 3.63 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: I2C
• Supply Current: 260 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

troller resets, the RTC I
a known state by toggling SCL until SDA is observed to
be at a high level. At that point the microcontroller
should pull SDA low while SCL is high, generating a
START condition.
The serial FRAM memory is logically organized as a
2048 x 8 or 8192 x 8 memory array and is accessed
using the I
FRAM is similar to serial EEPROMs with the major dif-
ference being its superior performance on writes. The
memory is read or written at the speed of the I
face. It is not necessary to poll the device for a ready
condition during writes.
Due to the different memory densities, the I
ing technique is different for each version of the device.
See the I
Warning: The FRAM does not inhibit reads or writes
when V
FRAM reads are destructive, that is, when a read is
performed, the device internally writes the memory
back to the original value. The FRAM must not be read
or written when V
voltage; otherwise, the memory cells may not be fully
programmed, and the data may not be retained.
Table 3 shows the RTC address map for the timekeep-
ing registers. During a multibyte access, when the
address pointer reaches the end of the register space,
it wraps around to location 00h. On an I
address pointer incrementing to location 00h, the cur-
rent time is transferred to a second set of registers. The
Table 2. Memory Slave Address
R = Read/write select bit
DS32B35
DS32C35
CC
2
C Serial Data Bus section for details.
DEVICE
2
is below the minimum operating voltage.
C interface. Functional operation of the
CC
is below the minimum operating
2
C interface may be placed into
RTC Address Map
Accurate I
SLAVE ADDRESS
1010 A
1010 000R
____________________________________________________________________
10
2
C START or
2
A
C address-
9
A
2
8
R
FRAM
C inter-
2
time information is read from these secondary registers,
while the clock continues to run. This eliminates the
need to reread the registers in case the main registers
update during a read.
The time and calendar information is obtained by read-
ing the appropriate register bytes. Table 3 illustrates the
RTC registers. The time and calendar data are set or ini-
tialized by writing the appropriate register bytes. The con-
tents of the time and calendar registers are in the
binary-coded decimal (BCD) format. The device can be
run in either 12-hour or 24-hour mode. Bit 6 of the hours
register is defined as the 12- or 24-hour mode select bit.
When high, the 12-hour mode is selected. In the 12-hour
mode, bit 5 is the AM/PM bit with logic-high being PM. In
the 24-hour mode, bit 5 is the 20-hour bit (20 to 23 hours).
The century bit (bit 7 of the month register) is toggled
when the years register overflows from 99 to 00.
The day-of-week register increments at midnight.
Values that correspond to the day of week are user-
defined but must be sequential (i.e., if 1 equals
Sunday, then 2 equals Monday, and so on). Illogical
time and date entries result in undefined operation.
When reading or writing the time and date registers, sec-
ondary (user) buffers are used to prevent errors when
the internal registers update. When reading the time and
date registers, the user buffers are synchronized to the
internal registers on any START and when the register
pointer rolls over to zero. The time information is read
from these secondary registers while the clock continues
to run. This eliminates the need to reread the registers in
case the main registers update during a read.
The countdown chain is reset whenever the seconds
register is written. Write transfers occur on the acknowl-
edge from the device. Once the countdown chain is
reset, to avoid rollover issues the remaining time and
date registers must be written within 1 second. The 1Hz
square-wave output, if enabled, transitions high 500ms
after the seconds data transfer, provided that the oscil-
lator is already running.
C RTC with Integrated
TCXO/Crystal/FRAM
Clock and Calendar
11