STLC7550TQF7TR STMicroelectronics, STLC7550TQF7TR Datasheet - Page 9

• Manufacturer Part Number: STLC7550TQF7TR
• Description: IC ANALOG FRONT END LV 48-TQFP
• Manufacturer: STMicroelectronics

Specifications of STLC7550TQF7TR

• Number Of Bits: 16
• Number Of Channels: 1
• Power (watts): 30mW
• Voltage - Supply, Analog: 3V
• Voltage - Supply, Digital: 3V
• Package / Case: 48-TQFP, 48-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

STLC7550
2.3
Note:
1
Clock generator
The IIR is a cascade of 5 biquads. It provides the low-pass filtering needed to remove the
noise remaining above half the sampling frequency. The output of the IIR will be processed
by the DSP.
The master clock, MCLK is provided by the user thanks to a crystal or external clock
generator (see
The MCLK could be equal to 36.864MHz (MCM = 1). In that case thanks to the divider M x
Q, the STLC7550 is able to generate all V.34bis and 56 Kbps sampling frequencies (see
Table
When MCM = 0, the MCLK must be equal to the oversampling frequency : Fs x OVER (7546
mode). The ADC and DAC are oversampled at the OCLK frequency. OCLK is equal to the
shift clock used in the serial interface.
The MCLK frequency should be :
MCLK = K x Sampling frequency
Combination of M, Q and oversampling ratios allows to generate several sampling
frequencies.
Recommended values for classical modem applications are as follow :
Table 2.
Recommended value.
F (kHz)
16.00
13.96
13.71
12.80
12.00
11.82
10.97
10.47
10.29
9.60
9.00
8.86
8.23
8.00
7.20
2).
Sampling Frequencies Generation
M
3
3
3
3
3
3
3
4
4
4
4
4
4
4
4
FQ = 36.864MHz
Figure
5.5
6.5
5.5
6.5
Q
6
7
6
8
7
7
6
8
7
6
8
3).
(1)
over
128
160
128
160
128
160
160
160
128
160
128
160
160
192
160
Rev 9
M
2
1
2
2
2
2
2
2
2
2
2
2
-
-
-
FQ = 18.432MHz
4.5
4.5
5.5
6.5
Q
7
6
7
6
8
7
6
8
-
-
-
over
128
192
160
128
160
128
160
128
160
160
192
160
-
-
-
Functional description
M
1
1
1
1
1
1
1
1
1
1
1
1
-
-
-
FQ = 9.216MHz
4.5
5.5
6.5
Q
6
7
6
7
6
8
7
6
8
-
-
-
over
160
128
160
128
160
128
160
160
192
160
96
96
-
-
-
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