CS5530-ISZ Cirrus Logic Inc, CS5530-ISZ Datasheet - Page 28

IC ADC 24BIT 1CH W/LNA 20SSOP

CS5530-ISZ

Manufacturer Part Number
CS5530-ISZ
Description
IC ADC 24BIT 1CH W/LNA 20SSOP
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5530-ISZ

Number Of Converters
1
Package / Case
20-SSOP
Number Of Bits
24
Sampling Rate (per Second)
3.84k
Data Interface
Serial
Power Dissipation (max)
45mW
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Adc Inputs
1
Architecture
Delta-Sigma
Conversion Rate
6.25 SPs to 3840 SPs
Resolution
24 bit
Input Type
Voltage
Interface Type
Serial (3-Wire)
Voltage Reference
2.5 V
Maximum Power Dissipation
500 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1158 - BOARD EVAL FOR CS5530
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1283-5

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2.9 Clock Generator
The CS5530 includes an on-chip inverting amplifi-
er which can be connected with an external crystal
to provide the master clock for the chip. Figure 17
illustrates the on-chip oscillator. It includes loading
capacitors and a feedback resistor to form a Pierce
oscillator configuration. The chips are designed to
operate using a 4.9152 MHz crystal; however, oth-
er crystals with frequencies between 1 MHz to 5
MHz can be used. One lead of the crystal should be
connected to OSC1 and the other to OSC2. Lead
lengths should be minimized to reduce stray capac-
itance. Note that while using the on-chip oscillator,
neither OSC1 or OSC2 is capable of directly driv-
ing any off chip logic. When the on-chip oscillator
is used, the voltage on OSC2 is typically 1/2 V
peak-to-peak. This signal is not compatible with
external logic unless additional external circuitry is
added. The OSC2 output should be used if the on-
chip oscillator output is used to drive other circuit-
ry.
The designer can use an external CMOS compati-
ble oscillator to drive OSC2 with a 1 MHz to 5
MHz clock for the ADC. The external clock into
OSC2 must overdrive the 60 microampere output
of the on-chip amplifier. This will not harm the on-
chip circuitry. In this scheme, OSC1 should be left
unconnected.
28
OSC1
NOTE: 20 pF capacitors are on chip and
should not be added externally.
Figure 17. On-chip Oscillator Model
20 pF
1 MΩ
~ ~ 60 μA
20 pF
V
OSC2
TH
+
-
MCLK
2.10 Power Supply Arrangements
The CS5530 is designed to operate from single or
dual analog supplies and a single digital supply.
The following power supply connections are possi-
ble:
VA+ = +5 V; VA- = 0 V; VD+ = +3 V to +5 V
VA+ = +2.5 V; VA- = -2.5 V; VD+ = +3 V to +5 V
VA+ = +3 V; VA- = -3 V; VD+ = +3 V
A VA+ supply of +2.5 V, +3.0 V, or +5.0 V should
be maintained at ±5% tolerance. A VA- supply of
-2.5 V or -3.0 V should be maintained at ±5% tol-
erance. VD+ can extend from +2.7 V to +5.5 V
with the additional restriction that [(VD+) - (VA-)
< 7.5 V].
Figure 18 illustrates the CS5530 connected with a
single +5.0 V supply to measure differential inputs
relative to a common mode of 2.5 V. Figure 19 il-
lustrates the CS5530 connected with ±2.5 V bipolar
analog supplies and a +3 V to +5 V digital supply
to measure ground referenced bipolar signals. Fig-
ures 20 illustrates the CS5532 connected with ±3 V
analog supplies and a +3 V digital supply to mea-
sure ground referenced bipolar signals.
CS5530
DS742F3

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