MAX19516ETM+ Maxim Integrated Products, MAX19516ETM+ Datasheet - Page 17

• Manufacturer Part Number: MAX19516ETM+
• Description: IC ADC 10BIT 100MSPS DUAL 48TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX19516ETM+

• Number Of Bits: 10
• Sampling Rate (per Second): 100M
• Data Interface: Serial, Parallel
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN Exposed Pad
• Conversion Rate: 100 MSPs
• Resolution: 10 bit
• Interface Type: SPI
• Snr: 60.1 dB
• Voltage Reference: 1.25 V
• Supply Voltage (max): 3.5 V
• Supply Voltage (min): 1.7 V
• Maximum Power Dissipation: 3200 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Input Voltage: 1.8 V
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register address 0Ah is a special-function register.
Writing data 5Ah to register 0Ah initiates a register
reset. When this operation is executed, all control regis-
Table 2. Register 0Ah Status Byte
Table 3. User-Programmable Registers
The SHDN input (pin 7) toggles between any two
power-management states. The Power Management
register defines each power-management state. In the
Power Management (00h)
HPS_SHDN1 STBY_SHDN1 C H B_ON _S H D N 1 C H A_O N _S H D N 1 HPS_SHDN0 STBY_SHDN0 CHB_ON_SHDN0 C H A_O N _S H D N 0
ADDRESS
BIT NO.
BIT 7
7
6
5
4
3
2
1
0
0Ah
00h
01h
02h
03h
04h
05h
06h
07h
08h
BIT 6
VALUE
0 or 1
0 or 1
0 or 1
0 or 1
______________________________________________________________________________________
POR DEFAULT
0
0
0
1
00000011
00000000
00000000
10110110
00000000
00000000
00000000
00000000
Reserved
—
Reserved
Reserved
1 = ROM read in progress
1 = ROM read completed and register data is valid (checksum is OK)
Reserved
Reserved
Reserved
1 = Duty-cycle equalizer DLL is locked
Dual-Channel, 10-Bit, 100Msps ADC
BIT 5
Power management
Output format
Digital output power management
Data/DCLK timing
C H A d ata outp ut ter m i nati on contr ol
C H B d ata outp ut ter m i nati on contr ol
C l ock d i vi d e/d ata for m at/test p atter n
Reserved—do not use
Common mode
Software reset
BIT 4
ters are reset to default values. A read operation of reg-
ister 0Ah returns a status byte with information
described in Table 2.
default state, SHDN = 1 shuts down the MAX19516 and
SHDN = 0 returns to full power.
BIT 3
DESCRIPTION
FUNCTION
BIT 2
User-Programmable Registers
BIT 1
BIT 0
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