LTC2440IGN#PBF Linear Technology, LTC2440IGN#PBF Datasheet - Page 26

IC ADC DIFFER 24-BIT HS 16-SSOP

LTC2440IGN#PBF

Manufacturer Part Number
LTC2440IGN#PBF
Description
IC ADC DIFFER 24-BIT HS 16-SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2440IGN#PBF

Number Of Bits
24
Sampling Rate (per Second)
3.5k
Data Interface
MICROWIRE™, Serial, SPI™
Number Of Converters
2
Power Dissipation (max)
40mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SSOP (0.150", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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LTC2440
APPLICATIONS INFORMATION
Example:
If an amplifi er (e.g. LT1219) driving the input of an LTC2440
has wideband noise of 33nV/√Hz, band-limited to 1.8MHz,
the total noise entering the ADC input is:
When the ADC digitizes the input, its digital fi lter fi lters
out the wideband noise from the input signal. The noise
reduction depends on the oversample ratio which defi nes
the effective bandwidth of the digital fi lter.
At an oversample of 256, the noise bandwidth of the ADC
is 787Hz which reduces the total amplifi er noise to:
The total noise is the RMS sum of this noise with the 2μV
noise of the ADC at OSR=256.
Increasing the oversampling ratio to 32768 reduces the
noise bandwidth of the ADC to 6.2Hz which reduces the
total amplifi er noise to:
26
33nV/√Hz • √1.8MHz = 44.3μV.
33nV/√Hz • √787Hz = 0.93μV.
√0.93μ/V
33nV/√Hz • √6.2Hz = 82nV.
2
+ 2μV
2
= 2.2μV.
The total noise is the RMS sum of this noise with the
200nV noise of the ADC at OSR = 32768.
In this way, the digital fi lter with its variable oversampling
ratio can greatly reduce the effects of external noise
sources.
Using Non-Autozeroed Amplifi ers for Lowest Noise
Applications
Ultralow noise applications may require the use of low
noise bipolar amplifi ers that are not autozeroed. Because
the LTC2440 has such exceptionally low offset, offset drift
and 1/f noise, the offset drift and 1/f noise in the ampli-
fi ers may need to be compensated for to retain the system
performance of which the ADC is capable.
The circuit of Figure 23 uses low noise bipolar amplifi ers
and correlated double sampling to achieve a resolution of
14nV, or 19 effective bits over a 10mV span. Each measure-
ment is the difference between two ADC readings taken
with opposite polarity bridge excitation. This cancels 1/f
noise below 3.4Hz and eliminates errors due to parasitic
thermocouples. Allow 750μs settling time after switching
excitation polarity.
√82nV
2
+ 2μV
2
= 216nV.
2440fd

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