TC850CLW Microchip Technology, TC850CLW Datasheet - Page 4

• Manufacturer Part Number: TC850CLW
• Description: IC ADC 15BIT FAST 44PLCC
• Manufacturer: Microchip Technology

Specifications of TC850CLW

• Data Interface: Parallel
• Number Of Bits: 15
• Sampling Rate (per Second): 40
• Number Of Converters: 1
• Voltage Supply Source: Dual ±
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Resolution (bits): 15bit
• Sampling Rate: 40SPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: ± 5V
• Supply Current: 2mA
• Digital Ic Case Style: LCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TC850
DS21479C-page 4
TABLE 1-1:
Electrical Characteristics: V
Note 1: Demand mode, CONT/DEMAND = LOW. Figure 8-2 timing diagram. C
Symbol
T
T
T
C
T
T
T
T
T
T
C
WWD
WRE
WRD
DHC
DHR
OUT
CE
RE
OP
LH
IN
2: Continuous mode, CONT/DEMAND = HIGH. Figure 8-4 timing diagram.
3: Digital inputs have CMOS logic levels and internal pull-up/pull-down resistors. For TTL compatibility, external pull-up
Input Capacitance
Output Capacitance
Chip-Enable Access Time
Read-Enable Access Time
Data Hold From CS or CE
Data Hold From RD
OVR/POL Data Access Time
Low/High Byte Access Time
Clock Setup Time
RD Minimum Pulse Width
RD Minimum Delay Time
WR Minimum Pulse Width
resistors to V
TC850 ELECTRICAL SPECIFICATIONS (CONTINUED)
Parameter
DD
are recommended.
S
= ±5V; F
CLK
= 61.44kHz, V
Min
100
450
150
—
—
—
—
—
—
—
—
75
FS
= 3.2768V, T
140
230
Typ
230
190
250
210
140
50
25
—
15
1
A
Max
450
450
450
450
300
300
= 25°C, Figure 1-1, unless otherwise specified.
—
—
—
—
—
—
L
= 100 pF.
nsec
nsec
nsec
nsec
nsec
nsec
nsec
nsec
nsec
nsec
Unit
pF
pF
Pins 1 - 7, 17
Pins 8 -15, High-impedance State
CS or CE, RD = LOW (Note 1)
CS = HIGH, CE = LOW, (Note 1)
RD = LOW, (Note 1)
CS = HIGH, CE = LOW, (Note 1)
CS = HIGH, CE = LOW,
RD = LOW, (Note 1)
CS = HIGH, CE = LOW,
RD = LOW, (Note 1)
Positive or Negative Pulse Width
CS = HIGH, CE = LOW, (Note 2)
CS = HIGH, CE = LOW, (Note 2)
CS = HIGH, CE = LOW, (Note 1)
© 2006 Microchip Technology Inc.
Test Conditions