AD7466BRTZ-R2 Analog Devices Inc, AD7466BRTZ-R2 Datasheet

AD7466BRTZ-R2

Manufacturer Part Number

AD7466BRTZ-R2

Description

IC ADC 12BIT 1.6V LP SOT23-6

Manufacturer

Analog Devices Inc

Datasheets

1.AD7468BRM-REEL.pdf (28 pages)

2.AD7466BRMZ.pdf (28 pages)

Specifications of AD7466BRTZ-R2

Data Interface

DSP, MICROWIRE™, QSPI™, Serial, SPI™

Design Resources

Software Calibrated, 50 MHz to 9 GHz, RF Power Measurement System (CN0178)

Number Of Bits

Sampling Rate (per Second)

200k

Number Of Converters

Power Dissipation (max)

900µW

Voltage Supply Source

Single Supply

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

SOT-23-6

Resolution (bits)

12bit

Sampling Rate

200kSPS

Input Channel Type

Single Ended

Supply Voltage Range - Analog

1.6V To 3.6V

Supply Current

300ÂµA

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

For Use With

EVAL-AD7466CBZ - BOARD EVALUATION FOR AD7466

Lead Free Status / RoHS Status

Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Meier Automation Equipment Co., Limited

Part Number:

AD7466BRTZ-R2

Manufacturer:

ADI/亚德诺

Quantity:

20 000

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FEATURES

Specified for V

Low power:

Fast throughput rate: 200 kSPS

Wide input bandwidth:

Flexible power/serial clock speed management

No pipeline delays

High speed serial interface:

Automatic power-down

Power-down mode: 8 nA typical

6-lead SOT-23 package

8-lead MSOP package

APPLICATIONS

Battery-powered systems

Medical instruments

Remote data acquisition

Isolated data acquisition

GENERAL DESCRIPTION

The AD7466/AD7467/AD7468

low power, successive approximation analog-to-digital

converters (ADCs), respectively. The parts operate from a single

1.6 V to 3.6 V power supply and feature throughput rates up to

200 kSPS with low power dissipation. The parts contain a low

noise, wide bandwidth track-and-hold amplifier, which can

handle input frequencies in excess of 3 MHz.

The conversion process and data acquisition are controlled

using CS and the serial clock, allowing the devices to interface

with microprocessors or DSPs. The input signal is sampled on

the falling edge of CS , and the conversion is also initiated at this

point. There are no pipeline delays associated with the part.

The reference for the part is taken internally from V

allows the widest dynamic input range to the ADC. Thus, the

analog input range for the part is 0 V to V

rate is determined by the SCLK.

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

Protected by U.S. Patent No. 6,681,332.

0.62 mW typical at 100 kSPS with 3 V supplies

0.48 mW typical at 50 kSPS with 3.6 V supplies

0.12 mW typical at 100 kSPS with 1.6 V supplies

71 dB SNR at 30 kHz input frequency

SPI/QSPI™/MICROWIRE™/DSP compatible

of 1.6 V to 3.6 V

are 12-/10-/8-bit, high speed,

. The conversion

. This

1.6 V, Micropower 12-/10-/8-Bit ADCs

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

PRODUCT HIGHLIGHTS

Specified for supply voltages of 1.6 V to 3.6 V.

12-, 10-, and 8-bit ADCs in SOT-23 and MSOP packages.

High throughput rate with low power consumption.

Power consumption in normal mode of operation at

100 kSPS and 3 V is 0.9 mW maximum.

Flexible power/serial clock speed management.

The conversion rate is determined by the serial clock,

allowing the conversion time to be reduced through

increases in the serial clock speed. Automatic power-down

after conversion allows the average power consumption to

be reduced when in power-down. Current consumption is

0.1 μA maximum and 8 nA typically when in power-down.

Reference derived from the power supply.

No pipeline delay.

The part features a standard successive approximation

ADC with accurate control of conversions via a CS input.

AD7466/AD7467/AD7468

FUNCTIONAL BLOCK DIAGRAM

T/H

AD7466/AD7467/AD7468

APPROXIMATION

SUCCESSIVE

12-/10-/8-BIT

CONTROL

LOGIC

Figure 1.

ADC

GND

www.analog.com

SCLK

SDATA

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