AD7492ARZ Analog Devices Inc, AD7492ARZ Datasheet - Page 14

• Manufacturer Part Number: AD7492ARZ
• Description: IC ADC 12BIT W/REF W/CLK 24-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD7492ARZ

• Data Interface: Parallel
• Number Of Bits: 12
• Sampling Rate (per Second): 1.25M
• Number Of Converters: 1
• Power Dissipation (max): 16.5mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• Resolution (bits): 12bit
• Input Channel Type: Single Ended
• Supply Voltage Range - Analogue: 2.7V To 5.25V
• Supply Voltage Range - Digital: 2.7V To 5.25V
• Supply Current: 3mA
• Sampling Rate: 1MSPS
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD7492CBZ - BOARD EVALUATION FOR AD7492
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD7492
POWER SUPPLIES
Separate power supplies for AV
if necessary, DV
The digital supply (DV
(AV
MICROPROCESSOR INTERFACING
AD7492 to ADSP-2185 Interface
Figure 19 shows a typical interface between the AD7492 and the
ADSP-2185. The ADSP-2185 processor can be used in one of two
memory modes, Full Memory Mode and Host Mode. The Mode
C pin determines in which mode the processor works. The inter-
face in Figure 19 is set up to have the processor working in Full
Memory Mode, which allows full external addressing capabilities.
When the AD7492 has finished converting, the BUSY line
requests an interrupt through the IRQ2 pin. The IRQ2 interrupt
has to be set up in the interrupt control register as edge-sensitive.
The DMS (Data Memory Select) pin latches in the address of the
A/D into the address decoder. The read operation is thus started.
AD7492 to ADSP-21065L Interface
Figure 20 shows a typical interface between the AD7492 and the
ADSP-21065L SHARC
of one of three DMA handshake modes. The MSX control line
is actually three memory select lines. Internal ADDR
decoded into MS
The DMAR
interrupt to signal end of conversion. The rest of the interface is
standard handshaking operation.
SHARC is a registered trademark of Analog Devices, Inc.
DD
ADSP-21065L
) by more than 0.3 V in normal operation.
ADSP-2185
ADDR
0
–ADDR
MODE C
1
A0–A15
D0–D23
D0–D31
DMAR
(DMA Request 1) is used in this setup as the
IRQ2
DMS
MS
RD
ADDITIONAL PINS OMITTED FOR CLARITY
RD
DD
23
ADDITIONAL PINS OMITTED FOR CLARITY
3-0
X
1
may share its power connection to AV
100k
, these lines are then asserted as chip selects.
ADDRESS BUS
DD
ADDRESS BUS
ADDRESS
DECODER
ADDRESS
DECODER
®
ADDRESS
DATA BUS
DATA BUS
) must not exceed the analog supply
LATCH
processor. This interface is an example
ADDRESS
BUS
DD
and DV
DD
are desirable, but
CS
BUSY
RD
DB0–DB9
(DB11)
CS
BUSY
RD
DB0–DB9
(DB11)
OPTIONAL
AD7492
OPTIONAL
AD7492
CONVST
CONVST
25–24
DD
are
.
AD7492 to TMS320C25 Interface
Figure 21 shows an interface between the AD7492 and the
TMS320C25. The CONVST signal can be applied from the
TMS320C25 or from an external source. The BUSY line inter-
rupts the digital signal processor when conversion is completed.
The TMS320C25 does not have a separate RD output to drive
the AD7492 RD input directly. This has to be generated from
the processor STRB and R/W outputs with the addition of some
glue logic. The RD signal is OR-gated with the MSC signal to
provide the WAIT state required in the read cycle for correct
interface timing. The following instruction is used to read the
conversion from the AD7492:
where D is Data Memory address and the ADC is the AD7492
address. The read operation must not be attempted during
conversion.
AD7492 to PIC17C4x Interface
Figure 22 shows a typical parallel interface between the AD7492
and PIC17C42/43/44. The microcontroller sees the A/D as
another memory device with its own specific memory address on
the memory map. The CONVST signal can either be controlled
by the microcontroller or an external source. The BUSY signal
provides an interrupt request to the microcontroller when a con-
version ends. The INT pin on the PIC17C42/43/44 must be
configured to be active on the negative edge. PORTC and PORTD
of the microcontroller are bidirectional and used to address the
AD7492 and also to read in the 12-bit data. The OE pin on the
PIC can be used to enable the output buffers on the AD7492 and
preform a read operation.
PIC17C4x
TMS320C25
AD0–AD15
DMD0–DMD15
ALE
INT
OE
A0–A15
READY
STRB
ADDITIONAL PINS OMITTED FOR CLARITY
MSC
R/W
ADDITIONAL PINS OMITTED FOR CLARITY
IS
ADDRESS BUS
DECODER
ADDRESS
DATA BUS
ADDRESS
IN D,ADC
LATCH
ADDRESS
DECODER
CS
BUSY
RD
DB0–DB9
(DB11)
OPTIONAL
AD7492
DB0–DB9
(DB11)
CS
RD
BUSY
CONVST
AD74792
OPTIONAL
CONVST