AD9271BSVZ-40 Analog Devices Inc, AD9271BSVZ-40 Datasheet - Page 22

IC ADC OCT 12BIT 40MSPS 100-TQFP

AD9271BSVZ-40

Manufacturer Part Number
AD9271BSVZ-40
Description
IC ADC OCT 12BIT 40MSPS 100-TQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9271BSVZ-40

Data Interface
Serial, SPI™
Number Of Bits
12
Sampling Rate (per Second)
40M
Number Of Converters
8
Power Dissipation (max)
1.28W
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad
Resolution (bits)
12bit
Sampling Rate
50MSPS
Input Channel Type
Differential, Single Ended
Supply Voltage Range - Digital
1.7V To 1.9V
Supply Current
613mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9271-50EBZ - BOARD EVALUATION AD9271 50MSPS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD9271
Because the amplifier has a gain of 6× from its input to its
differential output, it is important to note that the gain A/2 is
the gain from Pin LI-x to Pin LO-x, and it is 6 dB less than the
gain of the amplifier, or 9.6 dB (3×). The input resistance is
reduced by an internal bias resistor of 15 kΩ in parallel with the
source resistance connected to Pin LI-x, with Pin LG-x ac
grounded. Equation 2 can be used to calculate the needed R
for a desired R
For example, to set R
simplified equation (Equation 2) is used to calculate R
value is 190 Ω, resulting in a gain error less than 0.5 dB. Some
factors, such as the presence of a dynamic source resistance,
might influence the absolute gain accuracy more significantly.
At higher frequencies, the input capacitance of the LNA needs
to be considered. The user must determine the level of
matching accuracy and adjust R
The bandwidth (BW) of the LNA is about 70 MHz. Ultimately
the BW of the LNA limits the accuracy of the synthesized R
For R
100 kHz and 10 MHz, where the lower frequency limit is
determined by the size of the ac-coupling capacitors, and the
upper limit is determined by the LNA BW. Furthermore, the
input capacitance and R
Figure 42 shows R
Note that at the lowest value, 50 Ω, in Figure 42, R
frequencies greater than 10 MHz. This is due to the BW roll-off
of the LNA, as mentioned previously.
However, as can be seen for larger R
starts rolling off the signal BW before the LNA can produce
peaking. C
not be used for values of R
lists the recommended values for R
C
and Pin LI-x are unequal.
FB
is needed in series with R
R
IN
IN
= R
100
1k
10
=
100k
Figure 42. R
SH
S
1 (
R
R
R
R
R
up to about 200 Ω, the best match is between
further degrades the match; therefore, C
S
S
S
S
+
FB
IN
= 500Ω, R
= 200Ω, R
= 100Ω, R
= 50Ω, R
) 3
, even for higher values of R
(Effects of R
||
IN
15
vs. frequency for various values of R
IN
IN
FB
vs. Frequency for Various Values of R
FB
FB
FB
k
to 200 Ω, the value of R
= 200Ω, C
Ω
S
= 2kΩ
= 800Ω
= 400Ω, C
limit the BW at higher frequencies.
SH
1M
IN
and C
FB
FREQUENCY (Hz)
that are greater than 100 Ω. Table 7
because the dc levels at Pin LO-x
SH
SH
FB
SH
= 70pF
= 20pF
accordingly.
IN
Are Also Shown)
FB
values, parasitic capacitance
and C
10M
SH
IN
FB
.
in terms of R
is 845 Ω. If the
IN
FB
peaks at
SH
IN
, the
should
FB
50M
.
IN
IN
FB
.
Rev. B | Page 22 of 60
.
(2)
Table 7. Active Termination External Component Values
LNA Gain
LNA Noise
The short-circuit noise voltage (input-referred noise) is an
important limit on system performance. The short-circuit noise
voltage for the LNA is 1.2 nV/√Hz or 1.4 nV/√Hz (at 15.6 dB
LNA gain), including the VGA noise. These measurements,
which were taken without a feedback resistor, provide the basis
for calculating the input noise and noise figure (NF) performance
of the configurations shown in Figure 43. Figure 44 and Figure 45
are simulations of noise figure vs. R
urations and an input-referred noise voltage of 4 nV/√Hz for
the VGA. Unterminated (R
equivalent input noise and noise figure. Figure 45 shows the
noise figure vs. source resistance rising at low R
LNA voltage noise is large compared with the source noise—and
at high R
NF is achieved when R
S
due to the noise contribution from R
R
50
50
50
100
100
100
200
200
200
IN
V
V
V
IN
IN
IN
(Ω)
+
+
+
Figure 43. Input Configurations
ACTIVE IMPEDANCE MATCH
R
R
R
RESISTIVE TERMINATION
S
S
S
S
matches R
R
UNTERMINATED
IN
R
175
200
250
350
400
500
700
800
1000
FB
=
R
R
R
FB
1 + A/2
IN
IN
IN
= ∞) operation exhibits the lowest
R
(Ω)
FB
R
S
IN
S
R
.
results using these config-
FB
Minimum
C
90
70
50
30
20
10
N/A
N/A
N/A
SH
(pF)
V
V
V
OUT
OUT
OUT
FB
S
—where the
. The lowest
BW (MHz)
49
59
73
49
59
73
49
49
49

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