ADC0848BCJ National Semiconductor, ADC0848BCJ Datasheet - Page 4

• Manufacturer Part Number: ADC0848BCJ
• Description: IC ADC 8BIT MPU W/MUX OPT 20CDIP
• Manufacturer: National Semiconductor

Specifications of ADC0848BCJ

• Number Of Bits: 8
• Sampling Rate (per Second): 25k
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 875mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 20-CDIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *ADC0848BCJ

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V
I
I
I
I
t
t
t
Output Data Valid)
t
of RD to Hi-Z State)
t
of INTR
t
t
C
C
OUT
SOURCE
SINK
CC
C
W(WR)
ACC
1H
WI
DS
DH
OUT(0)
IN
OUT
, Maximum Conversion Time (See Graph)
AC Electrical Characteristics
The following specifications apply for V
T
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.
Note 2: All voltages are measured with respect to the ground pins.
Note 3: When the input voltage (V
to 5 mA or less. The 20 mA package input current limits the number of pins that can exceed the power supply boundaries with a 5 mA current limit to four.
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 5: Typical figures are at 25°C and represent most likely parametric norm.
Note 6: Tested limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 7: Design limits are guaranteed by not 100% tested. These limits are not used to calculate outgoing quality levels.
Note 8: Total unadjusted error includes offset, full-scale, linearity, and multiplexer error.
Note 9: For V
input voltages one diode drop below ground or one diode drop greater than V
inputs (5V) can cause this input diode to conduct, especially at elevated temperatures, and cause errors for analog inputs near full-scale. The spec allows 50 mV
forward bias of either diode. This means that as long as the analog V
To achieve an absolute 0 V
tolerance and loading.
Note 10: Off channel leakage current is measured after the channel selection.
Note 11: The temperature coefficient is 0.3%/°C.
Note 12: This product/package combination is obsolete. Shown for reference only.
, t
, t
, Minimum Data Set-Up Time
, Supply Current (Max)
, Minimum Data Hold Time
, Capacitance of Logic Inputs
MAX
, TRI-STATE Output Current (Max)
, Maximum Access Time (Delay from Falling Edge of RD to
, Output Sink Current (Min)
RI
0H
, Capacitance of Logic Outputs
, Minimum WR Pulse Width
, Maximum Delay from Falling Edge of WR or RD to Reset
, TRI-STATE Control (Maximum Delay from Rising Edge
, Logical “0” Output Voltage (Max)
; all other limits T
, Output Source Current (Min)
IN
Parameter
(−)
≥
V
IN
(+) the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input, which will forward-conduct for analog
DC
A
Parameter
= T
to 5 V
IN
j
) at any pin exceeds the power supply rails (V
= 25°C.
DC
input voltage range will therefore require a minimum supply voltage of 4.950 V
CC
V
I
V
V
V
V
CS =1, V
OUT
CC
OUT
OUT
OUT
OUT
= 5V
=4.75V,
Conditions
=1.6 mA
=0V
=5V
=0V
=V
DC
CC
, t
REF
r
= t
Open
f
IN
= 10 ns unless otherwise specified. Boldface limits apply from T
does not exceed the supply voltage by more than 50 mV, the output code will be correct.
(Note 5)
CC
−0.01
0.01
(Note 11)
C
C
(Note 11)
(Note 11)
(Note 11)
(Note 11)
Typ
−14
4
ADC0844BCJ (Note 12)
ADC0844CCJ (Note 12)
16
1
L
L
supply. Be careful during testing at low V
IN
= 100 pF (Note 11)
= 10 pF, R
< V
Conditions
−
or V
(Note 6)
Tested
Limit
IN
−6.5
0.4
8.0
2.5
−3
3
> V
L
+
= 10k
) the absolute value of the current at that pin should be limited
(Note 7)
Design
Limit
(Note 5)
Typ
145
125
200
30
50
50
ADC0848BCN, ADC0848CCN
ADC0848BCV, ADC0848CCV Limit
(Note 5)
0
5
5
−0.01
0.01
Typ
−14
DC
16
1
over temperature variations, initial
CC
levels (4.5V), as high level analog
ADC0844CCN
(Note 6)
Tested
Limit
(Note 6)
150
400
100
Tested
40
50
Limit
0.34
−0.3
−7.5
0.3
9.0
2.3
(Note 7)
Design
(Note 7)
Limit
Design
225
200
Limit
60
−6.5
0.4
8.0
2.5
−3
3
MIN
Units
Units
to
μs
ns
ns
ns
ns
ns
ns
pF
pF
mA
mA
mA
μA
μA
V
V