RD4247MAG3110 Freescale Semiconductor, RD4247MAG3110 Datasheet - Page 8

• Manufacturer Part Number: RD4247MAG3110
• Description: DEV KIT MAG3110 LFSTBUSB
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of RD4247MAG3110

• Sensor Type: Accelerometer, 3 Axis
• Sensing Range: ±10g
• Interface: I²C
• Sensitivity: 1mg/bit
• Voltage - Supply: 1.95 V ~ 3.6 V
• Embedded: No
• Utilized Ic / Part: MAG3110
• Features: LFSTBUSB For Communication To PC, MAG3110FC & MMA8451Q For System Calibration
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Application Sub Type: Magnetic Sensor
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4
magnetic transducer for sensing and an ASIC for control and digital I
4.1
magnetic data readings are available. Interrupt driven sampling allows operation without the overhead of software polling.
4.2
automatically by the MAG3110 ASIC before the magnetic field readings are written to registers 0x01 to 0x06 (see
There is no need for the user to apply the calibration correction in the software and the calibration coefficients are not therefore
accessible to the user.
offset which can be automatically subtracted from the magnetic field readings (see
4.3
up resistors (connected to VDDIO) are needed for SDA and SCL. When the bus is free, both lines are high. The I
compliant with Fast mode (400 kHz), and Normal mode (100 kHz) I
4.3.1
multiple masters and multiple slave devices on the same bus. I
the serial data line or SDA. Pull-up resistors are required on both lines.
as a HIGH to LOW transition on the data line while the clock line is held HIGH. A STOP condition is defined as a LOW to HIGH
transition on the data line while the clock line is held HIGH. At all other times, the data line can only change state when the clock
line is low. If the data line changes state when the clock is high, the I
is recognized.
condition is the slave address in the first 7 bits, and the eighth bit is the Read/Write (R/W) bit (read = 1, write = 0). The R/W bit
determines whether the I
– Write mode. When an address is sent, each device on the I
internal address. If the address matches, the device considers itself addressed by the Master and continues to respond. If the
address does not match, the device ignores further bus activity until the next start condition happens.
the ACK period. Because of the pull-up resistor, the data line will tend to float high. To signal ACK back to the master, the slave
must then pull the data line low during this clock period.
performed some other function, it can hold the clock line, SCL, low to force the transmitter into a wait state. Data transfer only
continues when the receiver is ready for another byte and releases the data line. This delay action is called clock stretching. The
MAG3110 device does clock stretching.
write bit is set in the lowest bit position. The I
Sensors
Freescale Semiconductor
MAG3110 is a small low-power, digital output, 3-axis linear magnetometer packaged in a 10 pin DFN. The device contains a
Communication with the MAG3110 takes place over an I
MAG3110 is factory calibrated for sensitivity and temperature coefficient. All factory calibration coefficients are applied
The offset registers in the addresses 0x09 to 0x0E are not a factory calibration offset but allow the user to define a hard iron
There are two signals associated with the I
I
An I
After START has been transmitted by the master, the bus is considered busy. The next byte of data transmitted after START
The ninth bit (clock pulse), following each I
The number of bytes per transfer can be unlimited. If a receiving device can't accept another complete byte of data until it has
A data transfer is always terminated by a STOP.
The MAG3110 I
2
C is an asynchronous, open collector driven, addressed and packetized serial bus interface. It is capable of supporting
2
C transaction starts with a start condition (START) and ends with a stop condition (STOP). A START condition is defined
Functionality
I
Factory Calibration
Digital Interface
2
C Serial Interface
General I
2
C 7-bit device address is 0x0E. In I
2
C master intends on receiving data from the slave – Read mode or intends to transmit data to the slave
2
C Operation
Table 8. Serial Interface Pin Description
Pin Name
VDDIO
SDA
SCL
INT
2
2
2
C 8-bit write address is therefore 0x1C and the read address 0x1D.
C byte is for the acknowledge (ACK) bit. The master releases the SDA line during
C bus: the Serial Clock Line (SCL) and the Serial Data line (SDA). External pull-
2
IO voltage
I
I
Data ready interrupt pin
2
2
C practice, the device address is shifted left by one bit field and a read/
C Serial Clock
C Serial Data
2
C bus. The MAG3110 also has an interrupt signal indicating that new
2
C bus compares the first 7 bits after a start condition with its own
2
C uses two bi-directional lines, the serial clock line or SCL and
Pin Description
2
2
C standards.
C transaction is aborted and the new start or stop condition
2
C communications.
section
4.3.3).
2
C interface is
section
MAG3110
5).
8