CS4385-DQZ Cirrus Logic Inc, CS4385-DQZ Datasheet - Page 31

IC DAC 8CH 114DB 192KHZ 48LQFP

CS4385-DQZ

Manufacturer Part Number
CS4385-DQZ
Description
IC DAC 8CH 114DB 192KHZ 48LQFP
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS4385-DQZ

Data Interface
Serial
Number Of Bits
24
Number Of Converters
8
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
520mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Resolution (bits)
24bit
Sampling Rate
192kSPS
Input Channel Type
Serial
Supply Voltage Range - Analog
4.75V To 5.25V
Supply Current
84mA
Digital Ic Case Style
QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1154 - BOARD EVAL FOR CS4385 DAC
Settling Time
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
598-1649

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Cirrus Logic Inc
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DS671F2
4.12
4.12.1 Hardware Mode
Recommended Power-Up Sequence
1. Hold RST low until the power supplies and configuration pins are stable, and the master and left/right
2. Bring RST high. The device will remain in a low power state with FILT+ low and will initiate the
clocks are locked to the appropriate frequencies, as discussed in
registers are reset to the default settings, FILT+ will remain low, and VQ will be connected to VA/2.
If RST can not be held low long enough the SDINx pins should remain static low until all other clocks
are stable, and if possible the RST should be toggled low again once the system is stable.
Hardware power-up sequence after approximately 512 LRCK cycles in Single-Speed Mode (1024
LRCK cycles in Double-Speed Mode, and 2048 LRCK cycles in Quad-Speed Mode).
Figure 25. Recommended Mute Circuitry
Section
4.1. In this state, the
CS4385
31

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