AD5762RCSUZ Analog Devices Inc, AD5762RCSUZ Datasheet
AD5762RCSUZ
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AD5762RCSUZ Summary of contents
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FEATURES Complete dual, 16-bit digital-to-analog converter (DAC) Programmable output range: ±10 V, ±10.2564 V, or ±10.5263 V ±1 LSB maximum INL error, ±1 LSB maximum DNL error Low noise: 60 nV/√Hz Settling time: 10 μs maximum Integrated reference buffers Internal ...
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AD5762R TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Functional Block Diagram .............................................................. 3 Specifications ..................................................................................... 4 AC Performance Characteristics ................................................ 6 Timing Characteristics ................................................................ 7 Absolute Maximum Ratings .......................................................... 10 ...
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FUNCTIONAL BLOCK DIAGRAM AV AV PGND AD5762R DGND 16 SDIN INPUT SHIFT SCLK REGISTER AND SYNC CONTROL LOGIC SDO D0 D1 BIN/2sCOMP CLR AV AV REFOUT REFGND REFERENCE REFERENCE 16 INPUT DAC REG ...
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AD5762R SPECIFICATIONS −11 −16.5 V, AGND = DGND = REFGND = PGND = 0 V; REFA = REFB = 5 V external 2 ...
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Parameter 2 DIGITAL INPUTS Input High Voltage Input Low Voltage Input Current Pin Capacitance 2 DIGITAL OUTPUTS (D0, D1, SDO) Output Low Voltage Output High Voltage Output Low Voltage Output High Voltage High Impedance Leakage Current ...
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AD5762R AC PERFORMANCE CHARACTERISTICS −11 −16.5 V, AGND = DGND = REFGND = PGND = 0 V; REFA, REFB external 2 ...
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TIMING CHARACTERISTICS −11 −16.5 V, AGND = DGND = REFGND = PGND = 0 V; REFA = REFB = 5 V external 2 ...
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AD5762R Timing Diagrams SCLK SYNC t 7 SDIN DB23 LDAC VOUTA/ VOUTB LDAC = 0 VOUTA/ VOUTB CLR VOUTA/ VOUTB SCLK SYNC t 7 DB23 SDIN SDO LDAC ...
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SCLK SYNC DB23 SDIN INPUT WORD SPECIFIES REGISTER TO BE READ SDO UNDEFINED TO OUTPUT Figure 5. Load Circuit for SDO Timing Diagram 24 DB0 DB23 NOP CONDITION DB23 SELECTED REGISTER DATA CLOCKED OUT Figure 4. Readback Timing Diagram 200µA ...
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AD5762R ABSOLUTE MAXIMUM RATINGS T = 25°C unless, otherwise noted. Transient currents 100 mA do not cause SCR latch-up. Table 4. Parameter Rating AV to AGND, DGND −0 + AGND, ...
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 6. Pin Function Descriptions Pin No. Mnemonic Description 1 SYNC Active Low Input. This is the frame synchronization signal for the serial interface. While SYNC is low, data is transferred in on the falling ...
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AD5762R Pin No. Mnemonic Description 22 VOUTA Analog Output Voltage of DAC A. Buffered output with a nominal full-scale output range of ±10 V. The output amplifier is capable of directly driving a 10 kΩ, 200 pF load ...
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TYPICAL PERFORMANCE CHARACTERISTICS 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 10,000 20,000 30,000 40,000 DAC CODE Figure 7. Integral Nonlinearity Error vs. DAC Code ± 1 25°C ...
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AD5762R 0.15 0.10 0.05 0 –0.05 –0.10 –0.15 –0. ±15V DD SS REFIN = 5V –0.25 –40 – TEMPERATURE (°C) Figure 13. Differential Nonlinearity Error vs. Temperature ± ...
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T = 25°C A 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 –1.2 –1.4 –1 REFERENCE VOLTAGE (V) Figure 19. Total Unadjusted Error vs. Reference Voltage ±16 9.0 ...
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AD5762R 7000 T = 25°C A REFIN = 5V 6000 5000 4000 3000 2000 1000 0 –1000 –10 –5 0 SOURCE/SINK CURRENT (mA) Figure 25. Source and Sink Capability of Output Amplifier with Positive Full Scale Loaded 10,000 T = ...
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REFIN = (kΩ) ISCC Figure 31. Short-Circuit Current vs 25° ...
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AD5762R 5.003 5.002 5.001 5.000 4.999 4.998 4.997 –40 – TEMPERATURE (°C) Figure 37. Reference Output Voltage vs. Temperature 20 DEVICES SHOWN 60 80 100 Figure 38. Reference Output Temperature Drift (−40°C to +85°C) Rev ...
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TERMINOLOGY Relative Accuracy or Integral Nonlinearity (INL) For the DAC, a measure of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer function. Differential Nonlinearity (DNL) The difference between the measured change ...
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AD5762R Digital Crosstalk A measure of the impulse injected into the analog output of one DAC from the digital inputs of another DAC but is measured when the DAC output is not updated specified in nanovolt- seconds (nV-sec) ...
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THEORY OF OPERATION The AD5762R is a dual, 16-bit, serial input, bipolar voltage output DAC that operates from supply voltages of ±11 ±16.5 V and has a buffered output voltage ±10.5263 V. Data is written ...
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AD5762R 68HC11* MOSI SDIN SCK SCLK PC7 SYNC PC6 LDAC MISO SCLK SYNC LDAC SCLK SYNC LDAC *ADDITIONAL PINS OMITTED FOR CLARITY. Figure 40. Daisy-Chaining the AD5762R Daisy-Chain Operation For systems that contain several devices, the SDO pin can be ...
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See Figure 41 for a simplified block diagram of the DAC load circuitry. I/V AMPLIFIER 16-BIT REFA, REFB DAC DAC LDAC REGISTER INPUT REGISTER SCLK INTERFACE SYNC LOGIC SDIN Figure 41. Simplified Serial Interface of Input Loading Circuitry for One ...
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AD5762R REGISTERS Table 9. Input Shift Register Format MSB DB23 DB22 DB21 0 REG2 R/W Table 10. Input Shift Register Bit Function Descriptions Register Bit Descriptions R/W Indicates a read from or a write to the addressed register REG2, REG1, ...
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DATA REGISTER The data register is addressed by setting the three REG bits to 010. The DAC address bits select the DAC channel with which the data transfer takes place (see Table 10). The data bits are positioned in DB15 ...
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AD5762R OFFSET REGISTER The offset register is addressed by setting the three REG bits to 101. The DAC address bits select the DAC channel with which the data transfer is to take place (see Table 10). The AD5762R offset register ...
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DESIGN FEATURES ANALOG OUTPUT CONTROL In many industrial process control applications vital that the output voltage be controlled during power-up and during brownout conditions. When the supply voltages are changing, the VOUTx pins are clamped ...
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AD5762R APPLICATIONS INFORMATION TYPICAL OPERATING CIRCUIT Figure 43 shows the typical operating circuit for the AD5762R. The only external components needed for this precision 16-bit DAC are decoupling capacitors on the supply pins and reference inputs, and an optional short-circuit ...
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V –15V 10µF 100nF TEMP BIN/2sCOMP +5V SYNC SYNC 1 SCLK SCLK 2 SDIN 3 SDIN SDO 4 SDO AD5762R 5 CLR LDAC 6 LDAC ...
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AD5762R LAYOUT GUIDELINES In any circuit where accuracy is important, careful consideration of the power supply and ground return layout helps to ensure the rated performance. Design the PCB on which the AD5762R is mounted such that the analog and ...
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EVALUATION BOARD Performance of the AD5762R can be evaluated using the AD5764R evaluation board. The evaluation board aids designers in evaluating the high per- formance of the part with a minimum of effort. All that is required with the evaluation ...
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... VIEW A ROTATED 90° CCW ORDERING GUIDE Model Function 1 AD5762RCSUZ Dual 16-Bit DAC 1 AD5762RCSUZ-REEL7 Dual 16-Bit DAC RoHS Compliant Part. ©2008–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 1.20 0.75 MAX 0.60 ...