AD5762RCSUZ Analog Devices Inc, AD5762RCSUZ Datasheet - Page 24

• Manufacturer Part Number: AD5762RCSUZ
• Description: IC DAC DUAL 16BIT 1LSB 32-TQFP
• Manufacturer: Analog Devices Inc

Specifications of AD5762RCSUZ

• Data Interface: Serial
• Settling Time: 8µs
• Number Of Bits: 16
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital, Dual ±
• Power Dissipation (max): 180mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP, 32-VQFP
• Resolution (bits): 16bit
• Sampling Rate: 84.6MSPS
• Input Channel Type: Serial
• Supply Voltage Range - Digital: 2.7V To 5.25V
• Supply Current: 4.25mA
• Digital Ic Case Style: QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5762R
REGISTERS
Table 9. Input Shift Register Format
MSB
DB23
R/W
Table 10. Input Shift Register Bit Function Descriptions
Register Bit
R/W
REG2, REG1, REG0
A2, A1, A0
Data
FUNCTION REGISTER
The function register is addressed by setting the three REG bits to 000. The values written to the address bits and the data bits determine
the function addressed. The functions available via the function register are outlined in Table 11 and Table 12.
Table 11. Function Register Options
REG2
0
0
0
0
Table 12. Explanation of Function Register Options
Option
NOP
Local Ground Offset Adjust
D0, D1 Direction
D0, D1 Value
SDO Disable
Clear
Load
REG1
0
0
0
0
DB22
0
REG0
0
0
0
0
Descriptions
Indicates a read from or a write to the addressed register
Used in association with the address bits, determines if a read or write operation is to the data register, offset
register, gain register, or function register
REG2
0
0
0
1
1
Decodes the DAC channels
A2
0
0
1
Data bits
A2
0
0
1
1
DB21
REG2
A1
0
0
0
0
Description
No operation instruction used in readback operations.
Set by the user to enable the local ground offset adjust function. Cleared by the user to disable the local
ground offset adjust function (default). See the Design Features section for more information.
Set by the user to enable the D0 and D1 pins as outputs. Cleared by the user to enable the D0 and D1 pins
as inputs (default). See the Design Features section for more information.
I/O port status bits. Logic values written to these locations determine the logic outputs on the D0 and D1
pins when configured as outputs. These bits indicate the status of the D0 and D1 pins when the I/O port is
active as an input. When enabled as inputs, these bits are don’t cares during a write operation.
Set by the user to disable the SDO output. Cleared by the user to enable the SDO output (default).
Addressing this function resets the DAC outputs to 0 V in twos complement mode and negative full scale in
binary mode.
Addressing this function updates the DAC registers and, consequently, the analog outputs.
A0
0
1
0
1
DB20
REG1
DB15 to DB6
Don’t care
DB19
REG0
REG1
0
1
1
0
0
A1
0
0
0
Rev. A | Page 24 of 32
DB5
Local ground
offset adjust
DB18
A2
DB4
D1
direction
REG0
0
0
1
0
1
A0
0
1
0
DB17
A1
Clear, data = don’t care
Load, data = don’t care
NOP, data = don’t care
DB3
D1
value
DB16
A0
DB2
D0
direction
Function
Function register
Data register
Coarse gain register
Fine gain register
Offset register
Channel Address
DAC A
DAC B
Both DACs
DB15 to DB0
DB1
D0
value
Data
DB0
SDO
disable
LSB