CS4351-DZZ Cirrus Logic Inc, CS4351-DZZ Datasheet - Page 28

• Manufacturer Part Number: CS4351-DZZ
• Description: IC DAC STER 112DB 192KHZ 20TSSOP
• Manufacturer: Cirrus Logic Inc

Specifications of CS4351-DZZ

• Data Interface: Serial
• Number Of Bits: 24
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 354mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Resolution (bits): 24bit
• Sampling Rate: 192kSPS
• Input Channel Type: Serial
• Supply Current: 15mA
• Digital Ic Case Style: TSSOP
• No. Of Pins: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1152 - BOARD EVAL FOR CS4351 DAC
• Settling Time: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

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6.5.1
6.6
6.6.1
SZC1
7
1
Ramp and Filter Control - Register 07h
Digital Volume Control (VOL7:0) Bits 7-0
Default = 00h (0 dB)
Function:
The Digital Volume Control registers allow independent control of the signal levels in 1/2 dB increments
from 0 to -127.5 dB. Volume settings are decoded as shown in
mented as dictated by the Soft and Zero Cross bits in the Power and Muting Control register.
The actual attenuation is determined by taking the decimal value of the volume register and multiplying
by 6.02/12.
Soft Ramp and Zero Cross Control (SZC1:0) Bits 7-6
Default = 10
Function:
Immediate Change
When Immediate Change is selected all level changes will take effect immediately in one step.
Zero Cross
Zero Cross Enable dictates that signal level changes, either by attenuation changes or muting, will occur
on a signal zero crossing to minimize audible artifacts. The requested level change will occur after a time-
out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample rate) if the signal
does not encounter a zero crossing. The zero cross function is independently monitored and implemented
for each channel.
Soft Ramp PCM
Soft Ramp allows level changes, both muting and attenuation, to be implemented by incrementally ramp-
ing, in 1/8 dB steps, from the current level to the new level at a rate of 1 dB per 8 left/right clock periods.
SZC1 SZC0
SZC0
0
0
1
1
6
0
Binary Code
0
1
0
1
00000000
00000001
00000110
11111111
RMP_UP
5
1
Table 9. Example Digital Volume Settings
Soft Ramp on Zero Crossings
Immediate Change
Description
RMP_DN
Zero Cross
Soft Ramp
Decimal Value
4
1
255
0
1
6
Reserved
3
0
Volume Setting
Table
FILT_SEL
-127.5 dB
-0.5 dB
-3.0 dB
2
0
0 dB
9. The volume changes are imple-
Reserved
1
0
CS4351
Reserved
DS566F1
0
1