AD8803ARZ Analog Devices Inc, AD8803ARZ Datasheet - Page 13

• Manufacturer Part Number: AD8803ARZ
• Description: IC DAC 8BIT OCTAL W/SD 16-SOIC
• Manufacturer: Analog Devices Inc
• Series: TrimDAC®r

Specifications of AD8803ARZ

• Data Interface: Serial
• Settling Time: 600ns
• Number Of Bits: 8
• Number Of Converters: 8
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 27.5mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Resolution (bits): 8bit
• Sampling Rate: 1.7MSPS
• Input Channel Type: Serial
• Supply Voltage Range - Analog: 2.7V To 5.5V
• Supply Current: 1mA
• Digital Ic Case Style: SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REV. A
*
* AD8801/AD8803 to M68HC11 Interface Assembly Program
*
* M68HC11 Register definitions
*
PORTC
*
DDRC
PORTD
*
DDRD
SPCR
*
SPSR
*
SPDR
*
* SDI RAM variables:
*
*
*
*
*
SDI1
SDI2
*
* Main Program
*
INIT
*
* Initialize Port C Outputs
*
*
*
* Initialize Port D Outputs
*
*
*
* Initialize SPI Interface
*
*
* Call update subroutine
*
*
* Subroutine UPDATE
*
UPDATE
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
ORG
LDS
LDAA
STAA
LDAA
STAA
LDAA
STAA
LDAA
STAA
LDAA
STAA
BSR
JMP
PSHX
$102A
$1003
$1007
$1008
$1009
$1028
$1029
$00
$01
$C000
#$CFFF
#$03
PORTC
#$03
DDRC
#$20
PORTD
#$38
DDRD
#$53
SPCR
UPDATE
$E000
Save registers X, Y, and A
Port C control register
“0,0,0,0;0,0,RS/, SHDN/”
Port C data direction
Port D data register
“0,0,/CS,CLK;SDI,0,0,0”
Port D data direction
SPI control register
“SPIE,SPE,DWOM,MSTR;CPOL,CPHA,SPR1,SPR0”
SPI status register
“SPIF,WCOL,0,MODF;0,0,0,0”
SPI data register; Read-Buffer; Write-Shifter
SDI1 is encoded from 0 (Hex) to 7 (Hex)
SDI2 is encoded from 00 (Hex) to FF (Hex)
AD8801/3 requires two 8-bit loads; upper 5 bits
of SDI1 are ignored. AD8801/3 address bits in last
three LSBs of SDI1.
SDI packed byte 1 “0,0,0,0;0,A2,A1,A0”
SDI packed byte 2 “DB7,DB6,DB5,DB4;DB3,DB2,DB1,DB0”
Start of user’s RAM in EVB
Top of C page RAM
0,0,0,0;0,0,1,1
/RS-Hi, /SHDN-Hi
Initialize Port C Outputs
0,0,0,0;0,0,1,1
/RS and /SHDN are now enabled as outputs
0,0,1,0;0,0,0,0
/CS-Hi,/CLK-Lo,SDI-Lo
Initialize Port D Outputs
0,0,1,1;1,0,0,0
/CS,CLK, and SDI are now enabled as outputs
SPI is Master,CPHA=0,CPOL=0,Clk rate=E/32
Xfer 2 8-bit words to AD8402
Restart BUFFALO
–13–
AD8801/AD8803