AD5551BRZ Analog Devices Inc, AD5551BRZ Datasheet - Page 12

• Manufacturer Part Number: AD5551BRZ
• Description: IC DAC 14BIT SERIAL-IN 8-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD5551BRZ

• Data Interface: Serial
• Settling Time: 1µs
• Number Of Bits: 14
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 6.05mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Resolution (bits): 14bit
• Sampling Rate: 1MSPS
• Input Channel Type: Serial
• Supply Voltage Range - Analog: 2.7V To 5.5V
• Supply Current: 300µA
• Digital Ic Case Style: SOIC
• Number Of Channels: 1
• Resolution: 14b
• Interface Type: Serial (3-Wire, SPI, QSPI, Microwire)
• Single Supply Voltage (typ): 3/5V
• Dual Supply Voltage (typ): Not RequiredV
• Architecture: R-2R
• Power Supply Requirement: Single
• Output Type: Voltage
• Integral Nonlinearity Error: ±1LSB
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: SOIC N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD5551/AD5552
Assuming a perfect reference, the worst-case output voltage
may be calculated from the following equation:
where:
V
D is the decimal code loaded to the DAC.
V
V
V
INL is the integral nonlinearity in volts.
BIPOLAR OUTPUT OPERATION
With the aid of an external op amp, the AD5552 may be confi-
gured to provide a bipolar voltage output. A typical circuit of
such operation is shown in Figure 24. The matched bipolar
offset resistors R
to achieve this bipolar output swing where R
Table 7 shows the transfer function for this output operating
mode. Also provided on the AD5552 are a set of Kelvin
connections to the analog ground inputs.
Table 7. Bipolar Code Table
DAC Latch Contents
MSB
11 1111 1111 1111
10 0000 0000 0000
00 0000 0000 0001
00 0000 0000 0000
00 0000 0000 0000
INTERFACE
OUT–UNI
REF
GE
ZSE
SERIAL
is the gain error in volts.
is the reference voltage applied to part.
is the zero-scale error in volts.
V
OUT
is the unipolar mode worst-case output.
0.1µF
−
UNI
CS
DIN
SCLK
LDAC
V
5V
DD
LSB
=
Figure 24. Bipolar Output (AD5552 Only)
DGND
FB
2.5V
2
D
14
and R
V
0.1µF
REFF
×
AGNDF AGNDS
AD5552
(
V
10µF
Analog Output
+V
+V
0 V
−V
−V
REF
INV
V
REF
REF
REF
REF
R
REFS
are connected to an external op amp
INV
+
× (8191/8192)
× (1/8192)
× (1/8192)
× (8191/8192) = –V
V
GE
RFB
R
)
FB
+
V
OUT
V
ZSE
INV
+
EXTERNAL
INL
FB
OP AMP
+5V
–5V
= R
REF
INV
UNIPOLAR
= 28 kΩ.
OUTPUT
Rev. A | Page 12 of 16
Assuming a perfect reference, the worst-case bipolar output
voltage may be calculated from the following equation.
where:
V
RD is the R
A is the op amp open-loop gain.
OUTPUT AMPLIFIER SELECTION
For bipolar mode, use a precision amplifier, supplied from a
dual power supply. This provides the ±V
supply application, selection of a suitable op amp may be more
difficult as the output swing of the amplifier does not usually
include the negative rail, in this case AGND. This can result in
some degradation of the specified performance unless the
application does not use codes near zero.
The selected op amp needs to have a very low-offset voltage,
(the DAC LSB is 152 μV with a 2.5 V reference), to eliminate
the need for output offset trims. Input bias current should also
be very low as the bias current multiplied by the DAC output
impedance (approximately 6K) adds to the zero-code error.
Rail-to-rail input and output performance is required. For fast
settling, the slew rate of the op amp should not impede the
settling time of the DAC. Output impedance of the DAC is
constant and code-independent, but to minimize gain errors,
the input impedance of the output amplifier should be as high
as possible. The amplifier should also have a 3 dB bandwidth of
1 MHz or greater. The amplifier adds another time constant to
the system, therefore increasing the settling time of the output.
A higher 3 dB amplifier bandwidth results in a faster effective
settling time of the combined DAC and amplifier.
FORCE SENSE BUFFER AMPLIFIER SELECTION
These amplifiers can be single-supply or dual supplies, low
noise amplifiers. A low-output impedance at high frequencies
is preferred as they need to be able to handle dynamic currents
of up to ±20 mA.
OS
is the external op amp input offset voltage.
V
OUT
−
BIP
FB
and R
=
[(
V
OUT
IN
resistor matching error, unitless.
−
UNI
+
V
1
OS
+
)(
2 (
2
+
+
RD
RD
/ )
REF
)
−
A
output. In a single-
V
REF
1 (
+
RD
)