UDA1345TS NXP Semiconductors, UDA1345TS Datasheet - Page 16

UDA1345TS

Manufacturer Part Number
UDA1345TS
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UDA1345TS

Single Supply Voltage (typ)
3V
Single Supply Voltage (min)
2.4V
Single Supply Voltage (max)
3.6V
Package Type
SSOP
Lead Free Status / Rohs Status
Compliant

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NXP Semiconductors
7.12.2.2
A 2-bit value (SC1 and SC0) to select the used external
clock frequency (see Table 15).
Table 15 System clock frequency settings
7.12.2.3
A 3-bit value (IF2 to IF0) to select the used data format
(see Table 16).
Table 16 Data input format settings
7.12.2.4
A 1-bit value to enable the digital DC filter (see Table 17).
Table 17 DC filtering
7.12.2.5
A 6-bit value to program the left and right channel volume
attenuation (VC5 to VC0). The range is 0 dB to −∞ dB in
steps of 1 dB (see Table 18).
2002 May 28
Economy audio CODEC
IF2
0
0
0
0
1
1
1
1
SC1
0
0
1
1
System clock frequency
Data input format
DC filter
Volume control
IF1
DC
0
0
1
1
0
0
1
1
0
1
SC0
0
1
0
1
IF0
0
1
0
1
0
1
0
1
I
LSB-justified; 16 bits
LSB-justified; 18 bits
LSB-justified; 20 bits
MSB-justified
MSB-justified output/
LSB-justified 16 bits input
MSB-justified output/
LSB-justified 18 bits input
MSB-justified output/
LSB-justified 20 bits input
no DC filtering
DC filtering
2
S-bus
FUNCTION
FUNCTION
FUNCTION
not used
512f
384f
256f
s
s
s
16
Table 18 Volume settings
7.12.2.6
A 2-bit value to enable the digital de-emphasis filter.
Table 19 De-emphasis settings
7.12.2.7
A 1-bit value to enable the digital DAC mute (playback).
Table 20 DAC mute
VC5 VC4 VC3 VC2 VC1 VC0
0
0
0
0
1
1
1
1
1
1
1
1
:
:
DE1
0
0
1
1
0
0
0
0
1
1
1
1
1
1
1
1
:
:
De-emphasis
Mute
MT
0
1
0
0
0
0
0
0
0
0
0
1
1
1
:
:
DE0
0
1
0
1
0
0
0
0
0
1
0
0
1
0
0
1
:
:
no de-emphasis
de-emphasis; 32 kHz
de-emphasis; 44.1 kHz
de-emphasis; 48 kHz
0
0
1
1
1
0
0
1
1
0
0
1
:
:
0
1
0
1
1
0
1
0
1
0
1
1
:
:
FUNCTION
FUNCTION
UDA1345TS
Product specification
no muting
muting
VOLUME (dB)
−50
−52
−54
−57
−60
−66
−∞
−∞
−1
−2
0
0
:
:

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