TS68EN360VA25L E2V, TS68EN360VA25L Datasheet - Page 12

• Manufacturer Part Number: TS68EN360VA25L
• Manufacturer: E2V

Specifications of TS68EN360VA25L

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

5.3
12
Power Considerations
0886C–HIREL–04/08
This device contains protective circuitry against damage due to high static voltages or electrical fields;
however, it is advised that normal precautions be taken to avoid application of any voltages higher than
maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage level (e.g., either GND or V
Table 5-2.
Table 5-3.
T
P
Where P
The average chip-junction temperature, T
where:
For most applications, P
Symbol
V
V
V
T
V
f
Symbol
J
D
sys
JC
JA
case
CC
IL
IH
OH
= T
= (V
T
T
Junction-to-Ambient, C/W
P
P
P
A
A
DD
J
D
INT
I/O
JA
+ (P
= T
I/O
= Ambient Temperature, C
= P
= Power Dissipation on Input and Output Pins-User Determined
= Package Thermal Resistance,
· I
= I
is the power dissipation on pins.
A
D
DD
INT
Parameter
Supply Voltage Range
Logic Low Level Input Voltage Range
Logic High Level Input Voltage Range
Operating Temperature
High Level Output Voltage
System Frequency
CC
·
Parameter
Thermal Resistance - Junction to Case
Thermal Resistance - Junction to Ambient
) + P
Recommended Conditions of Use
Unless otherwise stated, all voltages are referenced to the reference terminal
Thermal Characteristics
(P
+ P
· V
JA
D
)
CC
I/O
·
I/O
, Watts-chip Internal Power
JA
)
I/O
< 0.3 · P
INT
(For 25 MHz version)
(For 33 MHz version)
and can be neglected.
J
, in C can be obtained from:
(1)
+4.75
GND
+2.0
+2.4
Min
-55
240-pin Cerquad
240-pin Cerquad
241-pin PGA
241-pin PGA
DD
Typ
)
25
33
e2v semiconductors SAS 2008
TS68EN360
+5.25
+125
Max
+0.8
V
Value
27.4
22.8
CC
2
7
Unit
MHz
MHz
Unit
C/W
C/W
V
V
V
V
C