S2065A Applied Micro Circuits Corporation, S2065A Datasheet - Page 13

• Manufacturer Part Number: S2065A
• Manufacturer: Applied Micro Circuits Corporation

Specifications of S2065A

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.13V
• Operating Supply Voltage (max): 3.47V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Lead Free Status / Rohs Status: Not Compliant

October 13, 2000 / Revision G
Loss of Channel Lock will be reported as indicated in
Figure 9 and Table 8 by a 1-0-1 on the ERR, EOF,
and KFLAG signals, respectively. This is during the
“No Sync” state. The status lines will reflect the status
of the individual channels and the device will respond
to appropriate channel locking sequences and
deskew as necessary. Persistence of 1-0-1 status on
any channel is indicative of CRU lock failure, most
likely resulting from loss of receiver input signal. The
device will then respond to the channel locking se-
quence.
When operating in the Channel Lock Mode, the
TCLK[B-D] inputs must be tied low.
Channel Locking/Re-locking Procedure
The Channel locking/relocking procedures are sum-
marized below. Following these procedures will in-
sure proper CHANNEL LOCK operation of the
device. When powered up, the S2065 will lock to the
received data within approximately 2500 bit times.
The CRU must report lock for approximately 32,000
REFCLK periods (320 s) before channel locking is
enabled.
QUAD SERIAL BACKPLANE DEVICE WITH DUAL I/O
Figure 8. Channel Lock State Machine
All four channels in Re-Sync with
valid data within deskew window
RE-SYNC
4 K28.5 Detected
ACQUIRING SYNC
valid data outside deskew window
or SOFD = LOW
Errored codeword or
IN SYNC
Errored codeword or <4 K28.5
or SOFD = LOW
1. Ensure that the S2065 is in the “No Sync” state.
2. Transmit the appropriate synchronization se-
3. Wait for “channel lock detected” as defined by
The S2065 will enter the “No Sync” state if: any CRU
loses lock, if the CH_LOCK signal is de-asserted, if
four or more consecutive decoder errors are ob-
served, or if the decoder error rate exceeds 50% in a
block of 16 bytes, or if SOFD is low. If desired, the
CRU lock status of each channel can be checked by
de-asserting CH_LOCK and confirming that “Loss of
Sync” status (Table 8) is not reported by any chan-
nel. To reacquire Sync after moving to the “No Sync”
state, repeat steps 2 and 3 above.
This can be accomplished by resetting the device
by toggling SOFD low, or by de-asserting the
channel lock for several clock periods and then
re-asserting.
quence. Four K28.5 characters or the 16 word
SYNC sequence can be used to de-skew the
DOUT FIFOs. The 16 word SYNC character can
be generated by asserting SOFx=1 and
KGENx=1.
Table 8.
decoding error rate > 50% (block 16)
four sequential decoding errors or
One K28.5 Detected
CRU Loss of Lock or
NO SYNC
SOFD = LOW or
RESET
S2065
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