RD1950MPXM2010GS Freescale Semiconductor, RD1950MPXM2010GS Datasheet - Page 116

• Manufacturer Part Number: RD1950MPXM2010GS
• Manufacturer: Freescale Semiconductor

Specifications of RD1950MPXM2010GS

• Lead Free Status / Rohs Status: Compliant

System Integration Module (SIM)
The SIM counter is held in reset from the execution of the STOP instruction until the beginning of stop
recovery. It is then used to time the recovery period.
Figure 13-18
13.8 SIM Registers
The SIM has three memory mapped registers.
116
ADDRESS BUS
INTERRUPT
BUSCLKX4
ADDRESS BUS
NOTE: Previous data can be operand data or the STOP opcode, depending on the last instruction.
shows the stop mode recovery time from interrupt or break.
To minimize stop current, all pins configured as inputs should be driven to
a logic 1 or logic 0.
DATA BUS
CPUSTOP
R/W
Figure 13-18. Stop Mode Recovery from Interrupt
Address
STOP ADDR
$FE00
$FE01
$FE03
STOP +1
Figure 13-17. Stop Mode Entry Timing
MC68HC908QY/QT Family Data Sheet, Rev. 6
PREVIOUS DATA
Table 13-4. SIM Registers
STOP ADDR + 1
Register
SRSR
BFCR
BSR
Table 13-4
STOP + 2
NOTE
STOP RECOVERY PERIOD
NEXT OPCODE
Figure 13-17
STOP + 2
shows the mapping of these registers.
SAME
Access Mode
shows stop mode entry timing and
User
User
User
SP
SAME
SP – 1
SAME
SAME
Freescale Semiconductor
SP – 2
SP – 3