RD1950MPXM2010GS Freescale Semiconductor, RD1950MPXM2010GS Datasheet - Page 73

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RD1950MPXM2010GS

Manufacturer Part Number
RD1950MPXM2010GS
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of RD1950MPXM2010GS

Lead Free Status / Rohs Status
Compliant
Chapter 8
External Interrupt (IRQ)
8.1 Introduction
The IRQ pin (external interrupt), shared with PTA2 (general purpose input) and keyboard interrupt (KBI),
provides a maskable interrupt input
8.2 Features
Features of the IRQ module include the following:
8.3 Functional Description
IRQ pin functionality is enabled by setting configuration register 2 (CONFIG2) IRQEN bit accordingly. A
zero disables the IRQ function and PTA2 will assume the other shared functionalities. A one enables the
IRQ function.
A low level applied to the external interrupt request (IRQ) pin can latch a CPU interrupt request.
Figure 8-2
Interrupt signals on the IRQ pin are latched into the IRQ latch. The IRQ latch remains set until one of the
following actions occurs:
The external interrupt pin is falling-edge-triggered out of reset and is software-configurable to be either
falling-edge or falling-edge and low-level triggered. The MODE bit in INTSCR controls the triggering
sensitivity of the IRQ pin.
Freescale Semiconductor
External interrupt pin, IRQ
IRQ interrupt control bits
Programmable edge-only or edge and level interrupt sensitivity
Automatic interrupt acknowledge
Selectable internal pullup resistor
IRQ vector fetch — An IRQ vector fetch automatically generates an interrupt acknowledge signal
that clears the IRQ latch.
Software clear — Software can clear the IRQ latch by writing a 1 to the ACK bit in the interrupt
status and control register (INTSCR).
Reset — A reset automatically clears the IRQ latch.
shows the structure of the IRQ module.
MC68HC908QY/QT Family Data Sheet, Rev. 6
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