82V2608BB IDT, Integrated Device Technology Inc, 82V2608BB Datasheet - Page 26

• Manufacturer Part Number: 82V2608BB
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V2608BB

• Utopia Level: Level 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Package Type: BGA
• Pin Count: 208
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

Table-9 FIFO Interrupt Enable Register (FIFO_INT_ENABLE_REG)
Table-10 FIFO Interrupt Status Register (FIFO_STATE_REG)
Table-11 FIFO Interrupt Reset Register (FIFO_INT_RESET_REG)
Table-12 Output FIFO Internal State Register (OUTPUT_FIFO_INTERNAL_STATE_REG)
Output_FIFO_msg_available_int_en
Input_FIFO_overflow&empty_int_rst
Output_FIFO_msg_available_int_rst
Output_FIFO_msg_available_state
IDT82V2608
INTERFACE
Output_remain_msg_length[4:0]
Input_FIFO_overflow_int_en
Input_FIFO_overflow_state
Input_FIFO_empty_int_en
Input_FIFO_empty_state
(R/W, Address=04H)
(R, Address=05H)
(W, Address=06H)
(R, Address=07H)
HW_version
Symbol
Symbol
Symbol
Symbol
-
-
-
Position
Position
Position
Position
7-3
7-3
7-2
7-5
4-0
2
1
0
2
1
0
1
0
Default
Default
Default
Default
0
0
0
0
1
0
0
0
0
0
0
1
0
Reserved.
Input FIFO empty interrupt enable
0: Interrupt disabled
1: Interrupt enabled
Input FIFO overflow interrupt enable
0: Interrupt disabled
1: Interrupt enabled
Output FIFO message available interrupt enable
0: Interrupt disabled
1: Interrupt enabled
Current device version. For revision A and B, these bits are ‘0000’. For revision C, these bits are
‘0001’.
Input FIFO availability status
0: Input FIFO is not available for writing.
1: Input FIFO is available for writing.
Input FIFO overflow status
0: Input FIFO is not full.
1: Input FIFO is full.
Output FIFO message availability status
0: No message is in the Output FIFO.
1: A message is in the Output FIFO.
Reserved.
Write ‘1’ to clear the Input_FIFO_overflow_state status and Input_FIFO_empty_state status.
Write ‘1’ to clear the Output_FIFO_msg_available_state status.
Reserved.
The length of the message remaining in the Output FIFO to be read by the external microproces-
sor.
26
Description
Description
Description
Description
Inverse Multiplexing for ATM
December 4, 2006