PEB20570FV3.1T Infineon Technologies, PEB20570FV3.1T Datasheet - Page 150

• Manufacturer Part Number: PEB20570FV3.1T
• Manufacturer: Infineon Technologies

Specifications of PEB20570FV3.1T

• Lead Free Status / Rohs Status: Not Compliant

Data Transfer from the OAK to the µP
• The OAK reads the busy bit and checks whether the MB is available (OBUSY=’0’)
• The OAK writes to the data registers ODTn (optional)
• The OAK writes to the command register (OCMD). This write must be performed and
• A µP interrupt is activated due to the write operation to the register OCMD.
• The µP reads the command register and performs the command.
• When finished, the µP resets OBUSY for enabling the OAK to send the next
Note: The OAK may perform consecutive writes to the OAK Mailbox and the OAK
4.10
The DELIC provides two dedicated mailboxes that may be used in two different ways:
1. In DMA mode, one may be used as a DMA mailbox (16 bytes) and one as general
2. In Expanded Mailbox mode, the two mailboxes are regarded as one large general
The mailbox mode can be configured in the configuration register (MCFG:DMA).
The 16-byte deep DMA mailbox connects the DELIC and an external DMA controller.
The DMA mailbox can be accessed only by the DMA controller and only upon a request
from DELIC.
Note: The µP can not access the DMA mailbox. It can access directly only the General
The DMA mailbox can be used for different data transfers, e.g.:
• Data transfer via GHDLC (e.g. 2 Mbit/s)
• Transfer of D-channel signaling data (16 kbit/s)
• Recording and replay of voice channels (64 kbit/s)
• Fast data transfers between external and DELIC internal memories
The DMA mailbox consists of two separate parts:
• Transmit mailbox - for DMA data transfer from memory to DELIC.
• Receive mailbox - for DMA data transfer from DELIC to memory.
In order to transmit data, the DELIC must initiate a DMA Request for Transmit data
(DREQT); for receiving data, it initiates DREQR. The DMA controller answers with DMA
Acknowledge (DACK) signal together with RD or WR signal (Intel/Infineon bus type), or
R/W and DS (Motorola bus type). Which signals are used depends on the selected
Data Sheet
automatically sets the OAK Mailbox busy bit (OBUSY)
command.
purpose mailbox (16 bytes). Both mailboxes operate independently.
purpose mailbox, providing double number of registers (32 bytes).
firmware guarantees that the data has been transferred to the µP correctly
(OBUSY reset) before writing new data to the OAK Mailbox.
Mailbox.
DMA Mailbox (DELIC-PB only).
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Functional Description
PEB 20570
PEB 20571
2003-07-31